2009-03-27 21:25:22 +08:00
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/*
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* Early printk support for Microblaze.
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*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2003-2006 Yasushi SHOJI <yashi@atmark-techno.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/console.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/tty.h>
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#include <linux/io.h>
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#include <asm/processor.h>
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#include <linux/fcntl.h>
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#include <asm/setup.h>
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#include <asm/prom.h>
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static u32 base_addr;
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2010-09-28 14:40:00 +08:00
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#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
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2010-09-28 14:33:53 +08:00
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static void early_printk_uartlite_putc(char c)
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2009-03-27 21:25:22 +08:00
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{
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/*
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* Limit how many times we'll spin waiting for TX FIFO status.
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* This will prevent lockups if the base address is incorrectly
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* set, or any other issue on the UARTLITE.
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* This limit is pretty arbitrary, unless we are at about 10 baud
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* we'll never timeout on a working UART.
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*/
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2011-04-06 19:06:45 +08:00
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unsigned retries = 1000000;
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2009-03-27 21:25:22 +08:00
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/* read status bit - 0x8 offset */
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2009-04-17 04:49:17 +08:00
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while (--retries && (in_be32(base_addr + 8) & (1 << 3)))
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2009-03-27 21:25:22 +08:00
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;
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/* Only attempt the iowrite if we didn't timeout */
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/* write to TX_FIFO - 0x4 offset */
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if (retries)
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out_be32(base_addr + 4, c & 0xff);
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}
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2010-09-28 14:33:53 +08:00
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static void early_printk_uartlite_write(struct console *unused,
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2009-03-27 21:25:22 +08:00
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const char *s, unsigned n)
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{
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while (*s && n-- > 0) {
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if (*s == '\n')
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2010-09-28 14:33:53 +08:00
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early_printk_uartlite_putc('\r');
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2011-11-10 20:40:08 +08:00
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early_printk_uartlite_putc(*s);
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2009-03-27 21:25:22 +08:00
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s++;
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}
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}
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2010-09-28 14:33:53 +08:00
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static struct console early_serial_uartlite_console = {
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2009-03-27 21:25:22 +08:00
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.name = "earlyser",
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2010-09-28 14:33:53 +08:00
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.write = early_printk_uartlite_write,
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2011-04-04 21:45:06 +08:00
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.flags = CON_PRINTBUFFER | CON_BOOT,
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2009-03-27 21:25:22 +08:00
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.index = -1,
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};
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2010-09-28 14:40:00 +08:00
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#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
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2009-03-27 21:25:22 +08:00
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2010-09-28 14:17:03 +08:00
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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static void early_printk_uart16550_putc(char c)
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{
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/*
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* Limit how many times we'll spin waiting for TX FIFO status.
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* This will prevent lockups if the base address is incorrectly
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* set, or any other issue on the UARTLITE.
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* This limit is pretty arbitrary, unless we are at about 10 baud
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* we'll never timeout on a working UART.
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*/
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#define UART_LSR_TEMT 0x40 /* Transmitter empty */
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#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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unsigned retries = 10000;
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while (--retries &&
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!((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY))
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;
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if (retries)
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out_be32(base_addr, c & 0xff);
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}
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static void early_printk_uart16550_write(struct console *unused,
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const char *s, unsigned n)
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{
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while (*s && n-- > 0) {
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if (*s == '\n')
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early_printk_uart16550_putc('\r');
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2011-11-10 20:40:08 +08:00
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early_printk_uart16550_putc(*s);
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2010-09-28 14:17:03 +08:00
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s++;
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}
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}
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static struct console early_serial_uart16550_console = {
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.name = "earlyser",
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.write = early_printk_uart16550_write,
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2011-04-04 21:45:06 +08:00
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.flags = CON_PRINTBUFFER | CON_BOOT,
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2010-09-28 14:17:03 +08:00
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.index = -1,
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};
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#endif /* CONFIG_SERIAL_8250_CONSOLE */
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2009-03-27 21:25:22 +08:00
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int __init setup_early_printk(char *opt)
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{
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2011-04-14 17:48:43 +08:00
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int version = 0;
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2013-04-30 07:17:18 +08:00
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if (early_console)
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2009-03-27 21:25:22 +08:00
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return 1;
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2011-04-14 17:48:43 +08:00
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base_addr = of_early_console(&version);
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2009-03-27 21:25:22 +08:00
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if (base_addr) {
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2009-05-26 22:30:10 +08:00
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#ifdef CONFIG_MMU
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early_console_reg_tlb_alloc(base_addr);
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#endif
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2011-04-14 17:48:43 +08:00
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switch (version) {
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#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
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case UARTLITE:
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2012-12-27 17:40:38 +08:00
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pr_info("Early console on uartlite at 0x%08x\n",
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base_addr);
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2011-04-14 17:48:43 +08:00
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early_console = &early_serial_uartlite_console;
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break;
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#endif
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2010-09-28 14:17:03 +08:00
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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2011-04-14 17:48:43 +08:00
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case UART16550:
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2012-12-27 17:40:38 +08:00
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pr_info("Early console on uart16650 at 0x%08x\n",
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base_addr);
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2011-04-14 17:48:43 +08:00
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early_console = &early_serial_uart16550_console;
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break;
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2010-09-28 14:17:03 +08:00
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#endif
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2011-04-14 17:48:43 +08:00
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default:
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2012-12-27 17:40:38 +08:00
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pr_info("Unsupported early console %d\n",
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2011-04-14 17:48:43 +08:00
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version);
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return 1;
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}
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2010-09-28 14:17:03 +08:00
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2011-04-04 21:45:06 +08:00
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register_console(early_console);
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2010-09-28 14:17:03 +08:00
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return 0;
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}
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2010-09-28 14:40:00 +08:00
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return 1;
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2009-03-27 21:25:22 +08:00
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}
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2011-04-04 21:45:06 +08:00
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/* Remap early console to virtual address and do not allocate one TLB
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* only for early console because of performance degression */
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void __init remap_early_printk(void)
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{
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2013-04-30 07:17:18 +08:00
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if (!early_console)
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2011-04-04 21:45:06 +08:00
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return;
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2012-12-27 17:40:38 +08:00
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pr_info("early_printk_console remapping from 0x%x to ", base_addr);
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2011-04-04 21:45:06 +08:00
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base_addr = (u32) ioremap(base_addr, PAGE_SIZE);
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2012-12-27 17:40:38 +08:00
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pr_cont("0x%x\n", base_addr);
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2010-02-08 23:41:38 +08:00
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2012-04-02 18:50:54 +08:00
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#ifdef CONFIG_MMU
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2010-02-08 23:41:38 +08:00
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/*
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* Early console is on the top of skipped TLB entries
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* decrease tlb_skip size ensure that hardcoded TLB entry will be
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* used by generic algorithm
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* FIXME check if early console mapping is on the top by rereading
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* TLB entry and compare baseaddr
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* mts rtlbx, (tlb_skip - 1)
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* nop
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* mfs rX, rtlblo
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* nop
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* cmp rX, orig_base_addr
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*/
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tlb_skip -= 1;
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2012-04-02 18:50:54 +08:00
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#endif
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2011-04-04 21:45:06 +08:00
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}
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2009-03-27 21:25:22 +08:00
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void __init disable_early_printk(void)
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{
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2013-04-30 07:17:18 +08:00
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if (!early_console)
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2009-03-27 21:25:22 +08:00
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return;
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2012-12-27 17:40:38 +08:00
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pr_warn("disabling early console\n");
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2009-03-27 21:25:22 +08:00
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unregister_console(early_console);
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2013-04-30 07:17:18 +08:00
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early_console = NULL;
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2009-03-27 21:25:22 +08:00
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}
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