hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
linux-sg2042/drivers/gpio/Makefile

165 lines
7.0 KiB
Makefile
Raw Normal View History

License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
# SPDX-License-Identifier: GPL-2.0
gpio: remove some legacy comments in build files The build files for drivers/gpio has some wording and comments about the directory being reserved exclusively for GPIO expanders (according to the gpio.txt file these are on external busses) and this has been false for some time. We already have PL061 and Xilinx drivers which are in silicon and now I'm moving more silicon drivers here, so delete this and reword it a bit. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-05-20 14:40:19 +08:00
# generic gpio support: platform drivers, dedicated expander chips, etc
gpiolib: add drivers/gpio directory Add an empty drivers/gpio directory for gpiolib infrastructure and GPIO expanders. It will be populated by later patches. This won't be the only place to hold such gpio_chip code. Many external chips add a few GPIOs as secondary functionality (such as MFD drivers) and platform code frequently needs to closely integrate GPIO and IRQ support. This is placed *early* in the build/link sequence since it's common for other drivers to depend on GPIOs to do their work, so they must be initialized early in the device_initcall() sequence. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-05 14:28:17 +08:00
ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
gpio: devm_gpio_* support should not depend on GPIOLIB Some architectures (e.g. blackfin) provide gpio API without requiring GPIOLIB support (ARCH_WANT_OPTIONAL_GPIOLIB). devm_gpio_* functions should also work for these architectures, since they do not really depend on GPIOLIB. Add a new option GPIO_DEVRES (enabled by default) to control the build of devres.c. It also removes the empty version of devm_gpio_* functions for !GENERIC_GPIO build from linux/gpio.h, and moves the function declarations from asm-generic/gpio.h into linux/gpio.h. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-18 15:57:46 +08:00
obj-$(CONFIG_GPIOLIB) += gpiolib.o
gpio: Rename devres implementation file All the other core files are named "gpiolib-<something>" so let's rename the devres as well so we have some logical namespacing here. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-25 15:11:50 +08:00
obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
gpio: move integer GPIO support to its own file The old integer GPIO interface is, in effect, a privileged user of the gpiod interface. Reflect this fact further by moving legacy GPIO support into its own source file. This makes the code clearer and will allow us to disable legacy GPIO support in the (far) future. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-07-01 13:45:16 +08:00
obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
gpio: Rework of_gpiochip_set_names() to use device property accessors In order to use "gpio-line-names" property in systems not having DT as their boot firmware, rework of_gpiochip_set_names() to use device property accessors. This reworked function is placed in a separate file making it clear it deals with universal device properties. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-21 22:21:31 +08:00
obj-$(CONFIG_GPIOLIB) += gpiolib-devprop.o
gpio: Move DT support code into drivers/gpio The code in drivers/of/gpio.c isn't shared by any other subsystem since it is all gpiolib specific. drivers/gpio is a better place to maintain these functions. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Linus Walleij <linus.walleij@stericsson.com>
2012-04-08 04:31:33 +08:00
obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
gpio: move sysfs support to its own file sysfs support is currently entangled within the core GPIO support, while it should relly just be a (privileged) user of the integer GPIO API. This patch is a first step towards making the gpiolib code more readable by splitting it into logical parts. Move all sysfs support to their own source file, and share static members of gpiolib that need to be in the private gpiolib.h file. In the future we will want to put some of them back into gpiolib.c, but this first patch let us at least identify them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-07-01 13:45:15 +08:00
obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
gpio / ACPI: add ACPI support Add support for translating ACPI GPIO pin numbers to Linux GPIO API pins. Needs a gpio controller driver with the acpi handler hook set. Drivers can use acpi_get_gpio() to translate ACPI5 GpioIO and GpioInt resources to Linux GPIO's. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2012-11-30 19:37:36 +08:00
obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
gpiolib: add gpio provider infrastructure Provide new implementation infrastructure that platforms may choose to use when implementing the GPIO programming interface. Platforms can update their GPIO support to use this. In many cases the incremental cost to access a non-inlined GPIO should be less than a dozen instructions, with the memory cost being about a page (total) of extra data and code. The upside is: * Providing two features which were "want to have (but OK to defer)" when GPIO interfaces were first discussed in November 2006: - A "struct gpio_chip" to plug in GPIOs that aren't directly supported by SOC platforms, but come from FPGAs or other multifunction devices using conventional device registers (like UCB-1x00 or SM501 GPIOs, and southbridges in PCs with more open specs than usual). - Full support for message-based GPIO expanders, where registers are accessed through sleeping I/O calls. Previous support for these "cansleep" calls was just stubs. (One example: the widely used pcf8574 I2C chips, with 8 GPIOs each.) * Including a non-stub implementation of the gpio_{request,free}() calls, making those calls much more useful. The diagnostic labels are also recorded given DEBUG_FS, so /sys/kernel/debug/gpio can show a snapshot of all GPIOs known to this infrastructure. The driver programming interfaces introduced in 2.6.21 do not change at all; this infrastructure is entirely below those covers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-05 14:28:20 +08:00
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
# Device drivers. Generally keep list sorted alphabetically
obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
gpio: rename gpio-generic.c into gpio-mmio.c This patch renames the gpio-generic.c into gpio-mmio.c. This is because currently the file only contains code for a memory-mapped GPIO driver. There isn't any support for ioports or other resource type. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-28 17:05:12 +08:00
# directly supported by gpio-generic
gpio-generic-$(CONFIG_GPIO_GENERIC) += gpio-mmio.o
gpio: Add GPIO support for the ACCES 104-DIO-48E The ACCES 104-DIO-48E device provides 48 lines digital I/O via two Programmable Peripheral Interface (PPI) chips of type 82C55. Bit C3 at each 24-bit Group can be used as an external interrupt, triggered by a rising edge. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the dio_48e_base module parameter. The interrupt line number for the device may be configured via the dio_48e_irq module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-21 02:50:11 +08:00
obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o
gpio: Add GPIO support for the ACCES 104-IDIO-16 The ACCES 104-IDIO-16 family of PC/104 utility boards feature 16 optically isolated inputs and 16 optically isolated FET solid state outputs. This driver provides GPIO support for these 32 channels of digital I/O. Change-of-State detection interrupts are not supported. GPIO 0-15 correspond to digital outputs 0-15, while GPIO 16-31 correspond to digital inputs 0-15. The base port address for the device may be set via the idio_16_base module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20 00:59:14 +08:00
obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o
gpio: Add GPIO support for the ACCES 104-IDI-48 The ACCES 104-IDI-48 family of PC/104 utility boards feature 48 individually optically isolated digital inputs. Enabled inputs feature change-of-state detection capability; if change-of-state detection is enabled, an interrupt is fired off if a change of input level (low-to-high or high-to-low) is detected. Change-of-state IRQs are enabled/disabled on 8-bit boundaries, for a total of six boundaries. This driver provides GPIO and IRQ support for these 48 channels of digital input. The base port address for the device may be configured via the idi_48_base module parameter. The interrupt line number for the device may be configured via the idi_48_irq module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-24 01:54:50 +08:00
obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o
GPIO: Add driver for 74xx-ICs with MMIO access This patch adds driver to support GPIO functionality for 74xx-compatible ICs with MMIO access. Compatible models include: 1 bit: 741G125 (Input), 741G74 (Output) 2 bits: 742G125 (Input), 7474 (Output) 4 bits: 74125 (Input), 74175 (Output) 6 bits: 74365 (Input), 74174 (Output) 8 bits: 74244 (Input), 74273 (Output) 16 bits: 741624 (Input), 7416374 (Output) Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-03 15:31:57 +08:00
obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o
gpio: Add Avionic Design N-bit GPIO expander support This commit adds a driver for the Avionic Design N-bit GPIO expander. The expander provides a variable number of GPIO pins with interrupt support. Changes in v2: - allow building the driver as a module - assign of_node unconditionally - use linear mapping IRQ domain - properly cleanup IRQ domain - add OF device table and annotate device tables - emulate rising and falling edge triggers - increase #gpio-cells to 2 - drop support for !OF - use IS_ENABLED to conditionalize DEBUG_FS code Changes in v3: - make IRQ support runtime configurable (interrupt-controller property) - drop interrupt-controller and #interrupt-cells from DT binding - add inline to_adnp() function to wrap container_of() macro - consistently use adnp as name for struct adnp variables - remove irq_mask_cur and rename irq_mask to irq_enable - fix a subtle deadlock in adnp_gpio_direction_output() - remove dynamic allocations from debugfs code - rename regs to num_regs to avoid confusion - annotate non-trivial code with comments - don't acquire mutex in adnp_gpio_get() - assume NO_IRQ == 0 Cc: Grant Likely <grant.likely@secretlab.ca> Cc: devicetree-discuss@lists.ozlabs.org Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: linux-kernel@vger.kernel.org Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-18 16:57:10 +08:00
obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o
obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o
drivers/gpio: Altera soft IP GPIO driver Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: Tien Hock Loh <thloh@altera.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-02-24 17:53:03 +08:00
obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o
gpio: altera-a10sr: Add A10 System Resource Chip GPIO support. Add the GPIO functionality for the Altera Arria10 MAX5 System Resource Chip. The A10 MAX5 has 12 bits of GPIO assigned to switches, buttons, and LEDs as a GPIO extender on the SPI bus. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>i Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-03 01:52:24 +08:00
obj-$(CONFIG_GPIO_ALTERA_A10SR) += gpio-altera-a10sr.o
gpio: add a driver for GPIO pins found on AMD-8111 south bridge chips Add a driver to use GPIO pins available on several AMD south bridges (currently only AMD 8111 is supported). Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-01 21:36:31 +08:00
obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
gpio: driver for AMD Promontory This patch adds a new GPIO driver for AMD Promontory chip. This GPIO controller is enumerated by ACPI and the ACPI compliant hardware ID is AMDF030. Change history: v2: 1. fix coding style 2. registers renaming v3: 1. change include file 2. fix coding style 3. remove module_init/exit, add module_platform_driver 4. remove MODULE_ALIAS v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO 2. remove PCI dependency in Kconfig 3. fix subject line Signed-off-by: YD Tseng <Yd_Tseng@asmedia.com.tw> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-19 11:07:37 +08:00
obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
gpiolib: Add support for Wolfson Microelectronics Arizona class devices The Arizona class devices provide some GPIOs for use in the system. This driver provides support for these via gpiolib. Currently interrupts are not supported, normally the GPIOs are outputs only. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> [Fold in WM5110 support patch] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-23 20:29:25 +08:00
obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
gpio: ath79: Move to the generic GPIO driver Drop most of the code in favor of the generic MMIO GPIO driver. As the driver now depend on CONFIG_GPIO_GENERIC also add a Kconfig entry to make the driver optional. We leave the base pointer and lock in the data struct because they are needed for the IRQ support. Signed-off-by: Alban Bedel <albeu@free.fr> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-29 03:44:29 +08:00
obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
gpio: Add Aspeed driver The Aspeed SoCs contain GPIOs banked by letter, where each bank contains 8 pins. The GPIO banks are then grouped in sets of four in the register layout. The implementation exposes multiple banks through the one driver and requests and releases pins via the pinctrl subsystem. The hardware supports generation of interrupts from all GPIO-capable pins. A number of hardware features are not yet supported: Configuration of interrupt direction (ARM or LPC), debouncing, and WDT reset tolerance for output ports. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-30 15:54:27 +08:00
obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox service Pi3 and Compute Module 3 have a GPIO expander that the VPU communicates with. There is a mailbox service that now allows control of this expander, so add a kernel driver that can make use of it. Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-20 20:19:33 +08:00
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
gpio: bcm281xx: Add GPIO driver Add the GPIO driver for the Broadcom bcm281xx family of mobile SoCs. These GPIO controllers may contain up to 8 banks where each bank includes 32 pins that can be driven high or low and act as an edge sensitive interrupt. Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> [Added depends on OF_GPIO] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-11 02:07:01 +08:00
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
gpio: Add ROHM BD9571MWV-M PMIC GPIO driver Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC. This block is pretty trivial and supports setting GPIO direction as Input/Output and in case of Output, supports setting value. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-26 02:32:09 +08:00
obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
gpio: Add GPIO support for Broadcom STB SoCs This adds support for the GPIO IP "UPG GIO" used on Broadcom STB SoCs (BCM7XXX and some others). Uses basic_mmio_gpio to instantiate a gpio_chip for each bank. The driver assumes that it handles the base set of GPIOs on the system and that it can start its numbering sequence from 0, so any GPIO expanders used with it must dynamically assign GPIO numbers after this driver has finished registering its GPIOs. Does not implement the interrupt-controller portion yet, will be done in a future commit. v2: - change include to use <linux/gpio/driver.h> instead of <linux/gpio.h> - get rid of unnecessary imask member in struct bank - rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK - always have 32 GPIOs per bank and add 'width' member in struct bank to hold actual number of GPIOs in use - mark of_match table as const List-usage-fixed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-29 10:14:05 +08:00
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
gpio: Add Cadence GPIO driver This patch adds a driver for Cadence GPIO controller. It can be enabled with GPIO_CADENCE Kconfig option. It uses generic GPIO infrastructure and works as an interrupt controller. At the moment it only supports level sensitive irqs. Signed-off-by: Jan Kotas <jank@cadence.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-19 00:10:42 +08:00
obj-$(CONFIG_GPIO_CADENCE) += gpio-cadence.o
GPIO: Add support for GPIO on CLPS711X-target platform The CLPS711X CPUs provide some GPIOs for use in the system. This driver provides support for these via gpiolib. Due to platform limitations, driver does not support interrupts, only inputs and outputs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-10 00:05:56 +08:00
obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o
gpio: Add support for Intel Crystal Cove PMIC Devices based on Intel SoC products such as Baytrail have a Power Management IC. In the PMIC there are subsystems for voltage regulation, A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called Crystal Cove. This patch adds support for the GPIO function in Crystal Cove. Signed-off-by: Yang, Bin <bin.yang@intel.com> Signed-off-by: Zhu, Lejun <lejun.zhu@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03 13:26:04 +08:00
obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o
GPIO: DA9052 GPIO module v3 DA9052 PMIC has 16 bit GPIO bus for peripheral control. This patch add support for the GPIO pins on the DA9052. Signed-off-by: David Dajun Chen <dchen@diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-06 18:32:13 +08:00
obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o
DA9055 GPIO driver This is the GPIO patch for the DA9055 PMIC. This patch has got dependency on the DA9055 MFD core. This patch is functionally tested on SMDK6410 board. Signed-off-by: David Dajun Chen <dchen@diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-14 21:30:16 +08:00
obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o
gpio: introduce GPIO_DAVINCI kconfig option The compatible to Davinci GPIO HW block is used by other TI SoCs, like Keystone, where GPIO support is declared as optional. Hence, introduce GPIO_DAVINCI Kconfig option which will allow to enable Davinci GPIO driver for Keystone SoCs when needed. At same time, kept Davinci GPIO driver enabled for Davinci SoCs by default. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-11-21 23:34:36 +08:00
obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
gpio: add support for the Diolan DLN-2 USB GPIO driver This patch adds GPIO and IRQ support for the Diolan DLN-2 GPIO module. Information about the USB protocol interface can be found in the Programmer's Reference Manual [1], see section 2.9 for the GPIO module commands and responses. [1] https://www.diolan.com/downloads/dln-api-manual.pdf Signed-off-by: Daniel Baluta <daniel.baluta@intel.com> Signed-off-by: Octavian Purdila <octavian.purdila@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Johan Hovold <johan@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-11-06 21:48:05 +08:00
obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o
gpio: add a driver for the Synopsys DesignWare APB GPIO block The Synopsys DesignWare block is used in some ARM devices (picoxcell) and can be configured to provide multiple banks of GPIO pins. v12: - Add irq_startup/shutdown - do irq_create_mapping() in probe, irq_find_mapping() in to_irq() - Adjust mappings to show support for 1 gpio per port. - gpio-cells = <1> v11: - Use NULL when checking existence of 'interrupts' property - Bindings descriptions cleanup v10: - in documentation nr-gpio -> nr-gpios v9: - cleanup in dt bindings doc - use of_get_child_count() v8: - remove socfpga.dtsi changes - minor cleanup in devicetree documentation v7: - use irq_generic_chip - support one irq per gpio line or one irq for many - s/bank/port/ and other cleanup v6: - (atull) squash the set of patches - use linear irq domain - build fixes. Original driver was reviewed on v3.2. - Fix setting irq edge type for 'rising' and 'both'. - Support as a loadable module. - Use bgpio_chip's spinlock during register access. - Clean up register names to match spec - s/bank/port/ because register names use the word 'port' - s/nr-gpio/nr-gpios/ - don't get/put the of_node - remove signoffs/acked-by's because of changes - other cleanup v5: - handle sparse bank population correctly v3: - depend on rather than select IRQ_DOMAIN - split IRQ support into a separate patch v2: - use Rob Herring's irqdomain in generic irq chip patches - use reg property to indicate bank index - support irqs on both edges based on LinusW's u300 driver Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Alan Tull <atull@altera.com> Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-26 07:01:01 +08:00
obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o
gpio: Add Spreadtrum EIC driver support The Spreadtrum digital-chip EIC controller has 4 sub-modules: debounce EIC, latch EIC, async EIC and sync EIC, and each sub-module can has multiple banks and each bank contains 8 EICs. Each EIC can only be used as input mode, and has the capability to trigger interrupts when detecting input signals. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-05 10:56:51 +08:00
obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o
gpio: Emma Mobile GPIO driver V2 This patch is V2 of the Emma Mobile GPIO driver. This driver is designed to be reusable between multiple SoCs that share the same basic building block, but so far it has only been used on Emma Mobile EV2. Each driver instance handles 32 GPIOs with individually maskable IRQs. The driver operates on two I/O memory ranges and the 32 GPIOs are hooked up to two interrupts. In the case of Emma Mobile EV2 this GPIO building block is used as main external interrupt controller hooking up 159 GPIOS as 159 interrupts via 5 driver instances and 10 interrupts to the GIC and the Cortex-A9 Dual. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-05-17 14:22:23 +08:00
obj-$(CONFIG_GPIO_EM) += gpio-em.o
gpio/ep93xx: move driver to drivers/gpio The GPIO driver should reside in drivers/gpio. v3: Change Kconfig option to def_bool y v2: Make the Kconfig symbol a silent option, dependent on ARCH_EP93XX Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-02 01:09:19 +08:00
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
gpio: exar: add gpio for exar cards Exar XR17V352/354/358 chips have 16 multi-purpose inputs/outputs which can be controlled using gpio interface. Add the gpio specific code. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-20 06:23:20 +08:00
obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o
gpio: add GPIO support for F71882FG and F71889F This patch adds support for the GPIOs found on the Fintek super-I/O chips F71882FG and F71889F. A super-I/O is a legacy I/O controller embedded on x86 motherboards. It is used to connect the low-bandwidth devices. Among others functions the F71882FG/F71889F provides: a parallel port, two serial ports, a keyboard controller, an hardware monitoring controller and some GPIO pins. Note that this super-I/Os are embedded on some Atom-based LaCie NASes. The GPIOs are used to control the LEDs and the hard drive power. Changes since v3: - Use request_muxed_region to protect the I/O ports against concurrent accesses. Changes since v2: - Remove useless NULL setters for driver data. Changes since v1: - Enhance the commit message by describing what is a Super-I/O. - Use self-explanatory names for the GPIO register macros. - Add a comment to explain the platform device and driver registration. - Fix gpio_get when GPIO is configured in input mode. I only had the hardware to check this mode recently... Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-30 04:56:56 +08:00
obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
gpio: gemini: rename to match Faraday IP The Gemini driver is actually a driver for the Faraday Technology FTGPIO010 IP block. We rename the driver and the Kconfig symbol and put in a a new compatible string for the Moxa ART SoC that is also using this IP block. Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-13 07:28:16 +08:00
obj-$(CONFIG_GPIO_FTGPIO010) += gpio-ftgpio010.o
gpio: Move GE GPIO driver to reside within GPIO subsystem The GE GPIO driver provides basic support (set direction, read/write state) for the GPIO provided on some GE single board computers. This patch moves the driver from the 86xx specific platform directrory to the GPIO subsystem so that it can be used on non-86xx boards. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-13 01:12:58 +08:00
obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
gpio: Add GPIO support for the Diamond Systems GPIO-MM The Diamond Systems GPIO-MM device features 48 lines of digital I/O via the emulation of dual 82C55A PPI chips. This driver provides GPIO support for these 48 channels of digital I/O. The base port addresses for the devices may be configured via the base array module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-02 21:57:47 +08:00
obj-$(CONFIG_GPIO_GPIO_MM) += gpio-gpio-mm.o
gpio: grgpio: Add device driver for GRGPIO cores This driver supports GRGPIO gpio cores available in the GRLIB VHDL IP core library from Aeroflex Gaisler. Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-17 20:36:50 +08:00
obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o
gpio: Add GPIO driver for Nintendo Wii The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller that supports a configurable number of pins (up to 32), interrupts, and some special mechanisms to share the controller between the system's security processor (an ARM926) and the PowerPC CPU. Pin multiplexing is not supported. This patch adds a basic driver for this GPIO controller. Interrupt support will come in a later patch. This patch is based on code developed by Albert Herranz and the GameCube Linux Team, file arch/powerpc/platforms/embedded6xx/hlwd-gpio.c, available at https://github.com/DeltaResero/GC-Wii-Linux-Kernels, but has grown quite dissimilar. v3: - Do some style cleanups, as suggest by Andy Shevchenko v2: - Change hlwd_gpio_driver.driver.name to "gpio-hlwd" to match the filename (was "hlwd_gpio") - Remove unnecessary include of linux/of_gpio.h, as suggested by Linus Walleij. - Add struct device pointer to context struct to make it possible to use dev_info(hlwd->dev, "..."), as suggested by Linus Walleij - Use the GPIO_GENERIC library to reduce code size, as suggested by Linus Walleij - Use iowrite32be instead of __raw_writel for big-endian MMIO access, as suggested by Linus Walleij - Remove commit message paragraph suggesting to diff against the original driver, because it's so different now Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Cc: Albert Herranz <albert_herranz@yahoo.es> Reviewed-by: Segher Boessenkool <segher@kernel.crashing.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-09 20:07:29 +08:00
obj-$(CONFIG_GPIO_HLWD) += gpio-hlwd.o
mfd/gpio: Move HTC GPIO driver to GPIO subsystem The HTC GPIO driver is a pure GPIO driver and I just can not see what it is doing inside MFD. Let's just move it to GPIO and take this opportunity to move the platform data to <linux/platform_data/gpio-htc-egpio.h> Cc: arm@kernel.org Cc: Russell King <linux@armlinux.org.uk> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-09-16 19:48:12 +08:00
obj-$(CONFIG_HTC_EGPIO) += gpio-htc-egpio.o
gpio: Add support for Intel ICHx/3100/Series[56] GPIO This driver works on many Intel chipsets, including the ICH6, ICH7, ICH8, ICH9, ICH10, 3100, Series 5/3400 (Ibex Peak), Series 6/C200 (Cougar Point), and NM10 (Tiger Point). Additional Intel chipsets should be easily supported if needed, eg the ICH1-5, EP80579, etc. Tested on QM67 (Cougar Point), QM57 (Ibex Peak), 3100 (Whitmore Lake), and NM10 (Tiger Point). Includes work from Jean Delvare: - Resource leak removal during module load/unload - GPIO API bit value enforcement Also includes code cleanup from Guenter Roeck and Grant Likely. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-04-18 22:48:24 +08:00
obj-$(CONFIG_GPIO_ICH) += gpio-ich.o
ARM: plat-iop: move the GPIO driver to drivers/gpio Move the IOP GPIO driver to live with its siblings in the GPIO subsystem. Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Mikael Pettersson <mikpe@it.uu.se> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-09-09 17:59:51 +08:00
obj-$(CONFIG_GPIO_IOP) += gpio-iop.o
gpio: add GPIO support for IT87xx, replacing gpio-it8761e This patch adds support for the GPIOs found on the ITE super-I/O chips IT87xx. Signed-off-by: Diego Elio Pettenò <flameeyes@flameeyes.eu> Signed-off-by: Christophe Vu-Brugier <cvubrugier@fastmail.fm> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-09-22 00:24:24 +08:00
obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
gpio: Kontron PLD gpio driver Add gpio support for the on-board PLD found on some Kontron embedded modules. Originally-from: Michael Brunner <michael.brunner@kontron.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kevin Strasser <kevin.strasser@linux.intel.com> Acked-by: Darren Hart <dvhart@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 12:00:05 +08:00
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
gpio: fix a build failure on KS8695 GPIO I screwed up by compiling that driver for the machine rather than the arch. Correcting this fixes the build error. Cc: Grant Likely <grant.likely@secretlab.ca> Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-12-05 21:47:48 +08:00
obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
gpio: rename gpio-langwell to gpio-intel-mid gpio-langwell is a deprecated name. Despite the driver was made initially for Langwell, it supports now other Intel Mid SoC's. This patch does no change beside the file renaming with Kconfig/Makefile update. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-05 04:01:41 +08:00
obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o
MIPS: Move Loongson GPIO driver to drivers/gpio Move Loongson-2's GPIO driver to drivers/gpio and add Kconfig options. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-01 10:20:08 +08:00
obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
gpio: add LP3943 I2C GPIO expander driver This is one of LP3943 MFD driver. LP3943 is configurable as a GPIO expander, up to 16 GPIOs. * Application note: how to configure LP3943 as a GPIO expander http://www.ti.com/lit/an/snva287a/snva287a.pdf * Supported GPIO controller operations request, free, direction_input, direction_output, get and set * GPIO direction register not supported LP3943 doesn't have the GPIO direction register. It only provides input and output status registers. So, private data for the direction should be handled manually. This variable is updated whenever the direction is changed and used in 'get' operation. * Pin assignment A driver data, 'pin_used' is checked when a GPIO is requested. If the GPIO is already assigned, then returns as failure. If the GPIO is available, 'pin_used' is set. When the GPIO is not used anymore, then it is cleared. It is defined as unsigned long type for atomic bit operation APIs, but only LSB 16bits are used because LP3943 has 16 outputs. Signed-off-by: Milo Kim <milo.kim@ti.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2013-12-06 10:18:42 +08:00
obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
gpio: add lpc18xx gpio driver Driver for the GPIO block found on NXP LPC18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-03 05:11:34 +08:00
obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
ARM: 7044/1: mach-lpc32xx: move LPC32XX GPIO driver to GPIO subsystem As per example from the other ARM boards, push the LPC32XX GPIO driver down to the GPIO subsystem so it can be consolidated. Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Barry Song <bs14@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-22 15:44:45 +08:00
obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
gpio: lp873x: Add support for General Purpose Outputs Add driver for lp873x PMIC family GPOs. Two GPOs are supported and can be configured in Open-drain output or Push-pull output. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-08-31 16:58:11 +08:00
obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
gpio: lp87565: Add support for GPIO Add driver for lp87565 PMIC family GPIOs. Three GPIOs are supported and can be configured in Open-drain output or Push-pull output. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-15 14:33:11 +08:00
obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
gpio/lynxpoint: add chipset gpio driver. Add gpio support for Intel Lynxpoint chipset. Lynxpoint supports 94 gpio pins which can generate interrupts. Driver will fail requests for pins that are marked as owned by ACPI, or set in an alternate mode (non-gpio). Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-12-12 23:42:38 +08:00
obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
gpio: madera: Support Cirrus Logic Madera class codecs This adds support for the GPIOs on Cirrus Logic Madera class codecs. Any pins not used for special functions (see the pinctrl driver) can be used as general single-bit input or output lines. The number of available GPIOs varies between codecs. Note that this is part of a composite MFD for these codecs and can only be used with the corresponding MFD and other child drivers on those silicon. The GPIO block on these codecs does not exist indepedently of the rest of the MFD. Signed-off-by: Nariman Poushin <nariman@opensource.cirrus.com> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2018-05-21 18:00:02 +08:00
obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
gpio: Add driver for Maxim MAX3191x industrial serializer The driver was developed for and tested with the MAX31913 built into the Revolution Pi by KUNBUS, but should work with all members of the MAX3191x family: MAX31910: low power MAX31911: LED drivers MAX31912: LED drivers + 2nd voltage monitor + low power MAX31913: LED drivers + 2nd voltage monitor MAX31953: LED drivers + 2nd voltage monitor + isolation MAX31963: LED drivers + 2nd voltage monitor + isolation + buck regulator Cc: Mathias Duckeck <m.duckeck@kunbus.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-12 18:40:10 +08:00
obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o
obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o
obj-$(CONFIG_GPIO_MAX732X) += gpio-max732x.o
gpio: max77620: add gpio driver for MAX77620/MAX20024 MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-13 13:19:14 +08:00
obj-$(CONFIG_GPIO_MAX77620) += gpio-max77620.o
gpio: Add Fujitsu MB86S7x GPIO driver Driver for Fujitsu MB86S7x SoCs that have a memory mapped GPIO controller. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Tetsuya Nuriya <nuriya.tetsuya@jp.fujitsu.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-19 18:35:53 +08:00
obj-$(CONFIG_GPIO_MB86S7X) += gpio-mb86s7x.o
gpio: add driver for MEN 16Z127 GPIO controller The 16Z127 is a 32bit GPIO controller on a MCB FPGA. Every single line can be configured as input and output. Push pull and open drain are supported as well as setting a debounce value for the input lines. Signed-off-by: Andreas Werner <andy@wernerandy.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-01 02:44:43 +08:00
obj-$(CONFIG_GPIO_MENZ127) += gpio-menz127.o
gpio: merrifield: Introduce GPIO driver to support Merrifield Intel Merrifield platform has a special GPIO controller to drive pads when they are muxed in corresponding mode. Intel Merrifield GPIO IP is slightly different here and there in comparison to the older Intel MID platforms. These differences include in particular the shaked register offsets, specific support of level triggered interrupts and wake capable sources, as well as a pinctrl which is a separate IP. Instead of uglifying existing driver I decide to provide a new one slightly based on gpio-intel-mid.c. So, anyone can easily compare what changes are happened to be here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Brian J Wood <brian.j.wood@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-08 19:08:23 +08:00
obj-$(CONFIG_GPIO_MERRIFIELD) += gpio-merrifield.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o
ARM/mx35/3ds: gpio: add mc9s08dz60 gpio function we only use the gpio function of mc9s08dz60 mcu chip, so just add the gpio driver, as this mcu will never be used in other board. Signed-off-by: Wu Guoxing <b39297@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-01-30 14:31:20 +08:00
obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o
GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 patches will convert the drivers to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-12 00:48:39 +08:00
obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o
gpio/mockup: add virtual gpio device This patch add basic structure of a virtual gpio device(gpio-mockup) for testing gpio subsystem. The tester could manipulate such device through userspace(sysfs or char device) and check the result from debugfs. Currently, it support one or more gpiochip(determined by module parameters with base,ngpio pair). One could test the overlap of different gpiochip and test the direction and/or output values of these chips. Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-31 17:45:46 +08:00
obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o
gpio: Move mpc5200 gpio driver to drivers/gpio GPIO drivers are getting consolidated into drivers/gpio. While at it, change the driver name to mpc5200-gpio* to avoid collisions. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-07 01:54:19 +08:00
obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o
gpio: move mpc8xxx/512x gpio driver to drivers/gpio Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-21 18:49:20 +08:00
obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o
gpio: add MSIC gpio driver Add gpio support for Intel MSIC chips found in Intel Medfield platforms. MSIC supports totally 24 GPIOs with 16 low voltage and 8 high voltage pins. Driver uses MSIC mfd interface for MSIC access. (Updated comment to indicate why locking is actually safe) Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-04-24 18:02:49 +08:00
obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
gpio: mt7621: Add a driver for MT7621 Add driver support for gpio of MT7621 SoC. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: NeilBrown <neil@brown.name> [Switched wording WIDTH to STRIDE] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-07-05 21:43:10 +08:00
obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o
gpio: introduce gpio-mvebu driver for Marvell SoCs This driver aims at replacing the arch/arm/plat-orion/gpio.c driver, and is designed to be compatible with all Marvell EBU SoCs: Orion, Kirkwood, Dove, Armada 370/XP and Discovery. It has been successfully tested on Dove and Armada XP at the moment. Compared to the plat-orion driver, this new driver has the following added benefits: *) Support for Armada 370 and Armada XP *) It is integrated with the mvebu pinctrl driver so that GPIO pins are properly muxed, and the GPIO driver knows which GPIO pins are output-only or input-only. *) Properly placed in drivers/gpio *) More extensible mechanism to support platform differences. The plat-orion driver uses a simple mask-offset DT property, which works fine for Discovery MV78200 but not for Armada XP. The new driver uses different compatible strings to identify the different variants of the GPIO controllers. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@free-electrons.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-20 04:52:58 +08:00
obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o
gpio/mxc: Move Freescale MXC gpio driver to drivers/gpio GPIO drivers are getting moved to drivers/gpio for cleanup and consolidation. This patch moves the plat-mxc driver. Follow up patches will clean it up and make it a fine upstanding gpio driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-06 00:07:54 +08:00
obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o
gpio/mxs: Move Freescale mxs gpio driver to drivers/gpio GPIO drivers are getting moved to drivers/gpio for cleanup and consolidation. This patch moves the mxs driver. Follow up patches will clean it up and make it a fine upstanding example of a gpio driver. v2: Removed header file entirely and put struct definition directly into driver. The struct isn't used anywhere else in the kernel. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-06-06 23:37:58 +08:00
obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 05:29:10 +08:00
obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o
gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAP The ARCH_OMAP config option was used to built the GPIO OMAP driver but this is not consistent with the rest of the GPIO drivers that have their own Kconfig option. Also, this make it harder to add dependencies or reverse dependencies (i.e: select) since that would mean touching the sub-arch config option. So is better to add a boolean Kconfig option for this driver that defaults to true if ARCH_OMAP is enabled. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-06 22:58:15 +08:00
obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
gpio: Add GPIO support for the ACCES PCI-IDIO-16 The ACCES PCI-IDIO-16 device provides 32 lines of digital I/O (16 lines of optically-isolated digital inputs for AC and DC control signals, and 16 lines of solid state switch digital outputs). An interrupt is generated when any of the inputs change state (low to high or high to low). Input filter control is not supported by this driver, and input filters are deactivated by this driver. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-02-02 04:37:55 +08:00
obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-pci-idio-16.o
gpio: Add GPIO support for the ACCES PCIe-IDIO-24 family The ACCES PCIe-IDIO-24 device provides 56 lines of digital I/O (24 lines of optically-isolated non-polarized digital inputs for AC and DC control signals, 24 lines of isolated solid state FET digital outputs, and 8 non-isolated TTL/CMOS compatible programmable I/O). An interrupt is generated when any of the inputs change state (low to high or high to low). Input filter control is not supported by this driver, and input filters are deactivated by this driver. These devices are capable of get_multiple and set_multiple functionality, but these functions have not yet been implemented for this driver. Change-Of-State (COS) detection functionality may be configured to fire interrupts on exclusively rising/falling edges, but this driver currently only implements COS detection for either both edges or none. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-10 06:21:45 +08:00
obj-$(CONFIG_GPIO_PCIE_IDIO_24) += gpio-pcie-idio-24.o
gpio: Add driver for SPI serializers Add generic parallel-in/serial-out shift register GPIO driver. This includes SPI compatible devices like SN74165 serial-out shift registers and the SN65HVS88x series of industrial serializers that can be read over the SPI bus and used for GPI (General Purpose Input). Signed-off-by: Andrew F. Davis <afd@ti.com> Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-26 00:37:31 +08:00
obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
gpio: Add Spreadtrum PMIC EIC driver support The Spreadtrum PMIC EIC controller contains only one bank of debounce EIC, and this bank contains 16 EICs. Each EIC can only be used as input mode, as well as supporting the debounce and the capability to trigger interrupts when detecting input signals. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-05 10:56:52 +08:00
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
ARM: pxa: change gpio to platform device Remove most gpio macros and change gpio driver to platform driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
2011-10-17 20:37:52 +08:00
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
gpio/rc5t583: add gpio driver for RICOH PMIC RC5T583 The PMIC device RC5T583 from RICOH supports 8 gpios. Adding gpio driver for this device to access the pins control through gpio library. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [grant.likely: slight cosmetic changes] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2012-05-14 15:16:12 +08:00
obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
gpio: Renesas R-Car GPIO driver V3 This patch is V3 of a GPIO driver for the R-Car series of SoCs from Renesas. This driver is designed to be reusable between multiple SoCs that share the same basic building block, but so far it has only been used on R-Car H1 (r8a7779). Each driver instance handles 32 GPIOs with individually maskable IRQs. The driver operates on a single I/O memory range and the 32 GPIOs are hooked up a single interrupt. In the case of R-Car H1 either external IRQ pins or GPIOs with interrupts can be used for on-board interupts. For external IRQs 4 pins are supported, and in the case of GPIO there are 202 GPIOS as 202 interrupts hooked up via 6 driver instances and to the GIC and the Cortex-A9 Quad. At this point this driver is interfacing as a regular platform device driver. In the future DT support will be submitted as an incremental feature patch. Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-13 19:32:13 +08:00
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
gpio: add generic single-register fixed-direction GPIO driver Add a simple, generic, single register fixed-direction GPIO driver. This is able to support a single register with a mixture of inputs and outputs. This is different from gpio-mmio and gpio-74xx-mmio: * gpio-mmio doesn't allow a fixed direction, it assumes there is always a direction register. * gpio-74xx-mmio only supports all-in or all-out setups * gpio-74xx-mmio is DT only, this needs to support legacy too * they don't double-read when getting the GPIO value, as required by some implementations that this driver supports * we need to always do 32-bit reads, which bgpio doesn't guarantee * the current output state may not be readable from the hardware register - reading may reflect input status but not output status. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-31 15:49:44 +08:00
obj-$(CONFIG_GPIO_REG) += gpio-reg.o
ARM: 7049/1: mach-sa1100: move SA1100 GPIO driver to GPIO subsystem As per example from the other ARM boards, push the SA100 GPIO driver down to the GPIO subsystem so it can be consolidated. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-22 15:49:07 +08:00
obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
gpio: add driver for SAMA5D2 PIOBU pins PIOBU pins do not lose their voltage during Backup/Self-refresh. This patch adds a simple GPIO controller for them and a maintainer for the driver. This driver adds support for using the pins as GPIO offering the possibility to read/set the voltage. Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-12-12 19:57:15 +08:00
obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
gpio: add GPIO support for SMSC SCH311x This patch adds support for the GPIOs found on the SMSC "Super I/ SCH311x. The chip detection and I/O functions are copied from sch311x_wdt. Signed-off-by: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-05 07:56:43 +08:00
obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
GPIO: add single-register GPIO via CREG driver Add single-register MMIO GPIO driver for complex cases where only several fields in register belong to GPIO lines and each GPIO line owns a field with different length and on/off value. Such CREG GPIOs are used in Synopsys AXS10x and HSDK boards. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-28 21:15:30 +08:00
obj-$(CONFIG_GPIO_SNPS_CREG) += gpio-creg-snps.o
gpio: Add a driver for Sodaville GPIO controller Sodaville has GPIO controller behind the PCI bus. To my suprissed it is not the same as on PXA. The interrupt & gpio chip can be referenced from the device tree like from any other driver. Unfortunately the driver which uses the gpio interrupt has to use irq_of_parse_and_map() instead of platform_get_irq(). The problem is that the platform device (which is created from the device tree) is most likely created before the interrupt chip is registered and therefore irq_of_parse_and_map() fails. In theory the driver works as module. In reality most of the irq functions are not exported to modules and it is possible that _this_ module is unloaded while the provided irqs are still in use. Signed-off-by: Hans J. Koch <hjk@linutronix.de> [torbenh@linutronix.de: make it work after the irq namespace cleanup, add some device tree entries.] Signed-off-by: Torben Hohn <torbenh@linutronix.de> [bigeasy@linutronix.de: convert to generic irq & gpio chip] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> [grant.likely@secretlab.ca: depend on x86 to avoid irq_domain breakage] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-27 15:26:23 +08:00
obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o
gpio: SPEAr: add spi chipselect control driver SPEAr platform provides a provision to control chipselects of ARM PL022 Prime Cell spi controller through its system registers, which otherwise remains under PL022 control which some protocols do not want. This commit intends to provide the spi chipselect control in software over gpiolib interface. spi chip drivers can use the exported gpiolib interface to define their chipselect through DT or platform data. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-16 13:15:25 +08:00
obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o
gpio: Add GPIO driver for Spreadtrum SC9860 platform The Spreadtrum SC9860 platform GPIO controller contains 16 groups and each group contains 16 GPIOs. Each GPIO can set input/output and has the interrupt capability. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-24 10:07:18 +08:00
obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o
gpio: Add STA2X11 GPIO block This introduces 128 gpio bits (for each PCI device installed) with working interrupt support. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com> Cc: Alan Cox <alan@linux.intel.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-04-12 16:48:55 +08:00
obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o
GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 patches will convert the drivers to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-12 00:48:39 +08:00
obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o
gpio: Driver for SYSCON-based GPIOs SYSCON driver was designed for using memory areas (registers) that are used in several subsystems. There are systems (CPUs) which use bits in one register for various purposes and thus should be handled by various kernel subsystems. This driver allows you to use the individual SYSCON bits as GPIOs. ARM CLPS711X SYSFLG1 input lines has been added as first user of this driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-03-12 01:55:14 +08:00
obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o
gpio: add TB10x GPIO driver The GPIO driver for the Abilis Systems TB10x series of SOCs based on ARC700 CPUs. It supports GPIO control and GPIO interrupt generation. This driver works in conjunction with the TB10x pinctrl driver. Signed-off-by: Sascha Leuenberger <sascha.leuenberger@abilis.com> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 20:25:22 +08:00
obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
gpio: tegra: Allow compile test Allow compile testing this driver by adding a new config option which is enabled by default and depends on the old symbol or COMPILE_TEST. Signed-off-by: Alexander Stein <alexanders83@web.de>
2016-02-25 03:54:32 +08:00
obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o
gpio: Add Tegra186 support Tegra186 has two GPIO controllers that are largely register compatible between one another but are completely different from the controller found on earlier generations. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 02:15:56 +08:00
obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o
gpio: Add gpio driver support for ThunderX and OCTEON-TX Cavium ThunderX and OCTEON-TX are arm64 based SoCs. Add driver for the on-chip GPIO pins. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-18 08:53:35 +08:00
obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
gpio: palmas: Add support for Palmas GPIO Add gpio driver for TI Palmas series PMIC. This has 8 gpio which can work as input/output. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-01-03 18:46:59 +08:00
obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o
gpio: new driver to work with a 8x12 siox This driver controls a SIOX device that provides 20 I/O lines. The first twelve are fixed inputs, the remaining eight are outputs. Acked-by: Gavin Schenk <g.schenk@eckelmann.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-27 15:48:08 +08:00
obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o
gpio: Add driver for TI TPIC2810 Add driver for TI TPIC2810 8-Bit LED Driver with I2C Interface. The TPIC2810 has 8 open-drain outputs that can but used to drive LEDs and other low-side switched resistive loads. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-26 00:14:12 +08:00
obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o
gpio: tps65086: Add GPO driver for the TPS65086 PMIC Add support for the TPS65086 PMIC GPOs. TPS65086 has four configurable GPOs that can be used for several purposes. These are output only. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-02-07 00:12:10 +08:00
obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o
gpio: add tps65218 gpio Driver for the GPIO block found in ti's tps65218 pmics. The device has two GPIOs and one GPO pin which can be configured as follows: GPIO1: -general-purpose, open-drain output controlled by GPO1 user bit and/or sequencer -DDR3 reset input signal from SOC. Signal is either latched or passed-trough to GPO2 pin. See below for details. GPO2: -general-purpose output controlled by GPO2 user bit -DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD. See below for details. -Output buffer can be configured as open-drain or push-pull. GPIO3: -general-purpose, open-drain output controlled by GPO3 user bit and/or sequencer -reset input-signal for DCDC1 and DCDC2. The input configurations are not meant to be used by the user so the driver only offers GPOs. v2: Added request routine that evaluates the fw config flags and removed module owner v3: Added .direction_input() routine, and took care of all Linus Walleij suggestions (clamp to bool, use proper include) Signed-off-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-31 01:06:44 +08:00
obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o
gpio: tps6586x: Add gpio support through platform driver Converting the gpio driver of tps6586x to a platform driver in place of registering the gpio through core driver. The motivation of the change is: - This is inline with the mfd drivers implementation. - This will move the related gpio support to gpio driver folder where all gpio related drivers are available. This will be easy the maintenance and enhancement is anything done for gpio. - The gpio functionality can be selected through config variable. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-07-18 14:20:48 +08:00
obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
tps65912: gpio: add gpio driver TPS65912 has five GPIOs that can be configured for different purposes. Signed-off-by: Margarita Olaya Cabrera <magi@slimlogic.co.uk> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2011-06-10 03:50:19 +08:00
obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
gpio: Add support for TPS68470 GPIOs This patch adds support for TPS68470 GPIOs. There are 7 GPIOs and a few sensor related GPIOs. These GPIOs can be requested and configured as appropriate. The GPIOs are also provided with descriptive names. However, the typical use case is that the OS GPIO driver will interact with TPS68470 GPIO driver to configure these GPIOs, as requested by the platform firmware. Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-29 08:30:25 +08:00
obj-$(CONFIG_GPIO_TPS68470) += gpio-tps68470.o
gpio: add TS-4800 fpga GPIO support The TS-4800 GPIO driver provide support for the GPIOs available on the Technologic Sytems board FPGA. It allows to set direction and read/write states. It uses the generic gpio driver. Signed-off-by: Julien Grossholtz <julien.grossholtz@savoirfairelinux.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-14 00:57:43 +08:00
obj-$(CONFIG_GPIO_TS4800) += gpio-ts4800.o
gpio: add Technologic I2C-FPGA gpio support This driver is generic and aims to support all Technologic Systems's boards embedding FPGA GPIOs with an I2C interface. This driver supports TS-4900, TS-7970, TS-7990 and TS-4100 series. Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-12 23:16:49 +08:00
obj-$(CONFIG_GPIO_TS4900) += gpio-ts4900.o
gpio: add TS-5500 DIO blocks support Technologic Systems TS-5500 provides digital I/O lines exposed through pin blocks. On this platform, there are three of them, named DIO1, DIO2 and LCD port, that may be used as a DIO block. The TS-5500 pin blocks are described in the product's wiki: http://wiki.embeddedarm.com/wiki/TS-5500#Digital_I.2FO This driver is not limited to the TS-5500 blocks. It can be extended to support similar boards pin blocks, such as on the TS-5600. This patch is the V2 of the previous https://lkml.org/lkml/2012/9/25/671 with corrections suggested by Linus Walleij. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Jerome Oufella <jerome.oufella@savoirfairelinux.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-12-08 10:36:34 +08:00
obj-$(CONFIG_GPIO_TS5500) += gpio-ts5500.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
gpio: Add basic support for TWL6040 GPOs TWL6040 provides GPO lines to be used for controlling external devices.The number of lines different between versions: twl6040 have 3 GPO while TWL6041 have 1. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-08-16 20:13:15 +08:00
obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
gpio: uniphier: add UniPhier GPIO controller driver This GPIO controller is used on UniPhier SoC family. It also serves as an interrupt controller, but interrupt signals are just delivered to the parent irqchip without any latching or OR'ing. This type of hardware can be well described with hierarchy IRQ domain. One unfortunate thing for this device is that the interrupt mapping to the interrupt parent is not contiguous. I asked how DT can describe interrupt mapping between two irqchips [1], but I could not find a good solution (at least in the framework level). In fact, irqchip drivers using hierarchy domain generally hard-code the DT binding of their parent. After tackling on several approaches such as hard-code of hwirqs, irq_domain_push_irq(), I ended up with a vendor specific property. If we come up with a good idea to support this in the framework, we can migrate over to it, but we can live with a driver-level solution for now. [1] https://lkml.org/lkml/2017/7/6/758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-12 19:36:16 +08:00
obj-$(CONFIG_GPIO_UNIPHIER) += gpio-uniphier.o
gpio: vf610: add gpiolib/IRQ chip driver for Vybrid Add a gpiolib and IRQ chip driver for Vybrid ARM SoC using the Vybrid's GPIO and PORT module. The driver is instanced once per each GPIO/PORT module pair and handles 32 GPIO's. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-17 03:47:58 +08:00
obj-$(CONFIG_GPIO_VF610) += gpio-vf610.o
gpio: Add viperboard gpio driver This adds the mfd cell to use the gpio a and gpio b part of the Nano River Technologies viperboard. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2012-11-05 22:48:24 +08:00
obj-$(CONFIG_GPIO_VIPERBOARD) += gpio-viperboard.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
gpio: Add Intel WhiskeyCove PMIC GPIO driver This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC. This driver is based on gpio-crystalcove.c. Changes in v7: - Fixed various coding style comments from Andy Shevchenko Changes in v6: - Removed unnecessary wcove_gpio_remove() - Used devm_gpiochip_remove() instead of gpiochip_remove() - Various coding style changes per Mika's comment Changes in v5: - Revisited the interrupt handler code to iterate until all pending interrupts are handled. This change is to avoid missing interrupt when we're inside the interrupt handler. - Used regmap_bulk_read() to read address adjacent registers. Changes in v4: - Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX. - Add comments about why there is no .pm for the driver. - Header files re-ordered. - Various coding style change to address Andy's comments. Changes in v3: - Fixed the year in copyright line(2015-->2016). - Removed DRV_NAME macro. - Added kernel-doc for regmap_irq_chip of the wcove_gpio structure. - Line length fix. Changes in v2: - Typo fix (Whsikey --> Whiskey). - Included linux/gpio/driver.h instead of linux/gpio.h - Implemented .set_single_ended(). - Added GPIO register description. - Replaced container_of() with gpiochip_get_data(). - Removed unnecessary "if (gpio > WCOVE_VGPIO_NUM" check. - Removed the device id table and added MODULE_ALIAS(). Signed-off-by: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Signed-off-by: Bin Gao <bin.gao@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-26 05:59:38 +08:00
obj-$(CONFIG_GPIO_WHISKEY_COVE) += gpio-wcove.o
gpio: winbond: Add driver This commit adds GPIO driver for Winbond Super I/Os. Currently, only W83627UHG model (also known as Nuvoton NCT6627UD) is supported but in the future a support for other Winbond models, too, can be added to the driver. A module parameter "gpios" sets a bitmask of GPIO ports to enable (bit 0 is GPIO1, bit 1 is GPIO2, etc.). One should be careful which ports one tinkers with since some might be managed by the firmware (for functions like powering on and off, sleeping, BIOS recovery, etc.) and some of GPIO port pins are physically shared with other devices included in the Super I/O chip. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-01-06 07:46:08 +08:00
obj-$(CONFIG_GPIO_WINBOND) += gpio-winbond.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
gpio: Add GPIO support for the WinSystems WS16C48 The WinSystems WS16C48 device provides 48 lines of digital I/O. In addition, the first 24 lines may be used for interrupt-handled edge detection; rising edge detection and falling edge detection are supported. This driver provides GPIO and IRQ support for these 48 channels of digital I/O. The base port address for the device may be configured via the ws16c48_base module parameter. The interrupt line number for the device may be configured via the ws16c48_irq module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-01-21 02:45:33 +08:00
obj-$(CONFIG_GPIO_WS16C48) += gpio-ws16c48.o
gpio: Add APM X-Gene SoC GPIO controller support Add APM X-Gene SoC gpio controller driver. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-08-01 03:03:25 +08:00
obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o
gpio: Add APM X-Gene standby GPIO controller driver Driver for standby GPIO controller of APM X-Gene SoCs on arm64. Signed-off-by: Y Vo <yvo@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-16 15:34:19 +08:00
obj-$(CONFIG_GPIO_XGENE_SB) += gpio-xgene-sb.o
gpio: reorganize drivers Sort the gpio makefile and enforce the naming convention gpio-*.c for gpio drivers. v2: cleaned up filenames in Kconfig and comment blocks v3: fixup use of BASIC_MMIO to GENERIC_GPIO for mxc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-06-05 08:38:28 +08:00
obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
gpio: xlp: GPIO controller for Netlogic XLP SoCs Add GPIO controller driver for Netlogic XLP MIPS64 SOCs. This driver is instantiated by device tree and supports interrupts for GPIOs. Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-28 22:40:45 +08:00
obj-$(CONFIG_GPIO_XLP) += gpio-xlp.o
gpio: xra1403: Add EXAR XRA1403 SPI GPIO expander driver This driver support basic XRA1403 functionalities: - set gpio direction - get gpio direction - set gpio high/low - get gpio status Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Semi Malinen <semi.malinen@ge.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-15 13:58:25 +08:00
obj-$(CONFIG_GPIO_XRA1403) += gpio-xra1403.o
gpio: driver for Xtensa GPIO32 GPIO32 is a standard optional extension to the Xtensa architecture core that provides preconfigured output and input ports for intra SoC signaling. The GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE) output state called EXPSTATE, and 32bit input wire called IMPWIRE. This driver treats input and output states as two distinct devices. v3: * Use BUG() in xtensa_impwire_set_value() to indicate that it should never be called (Linus Walleij) v2: * Address the comments of Linus Walleij: - Add a few comments - Expand commit log message - Use the BIT() macro for bit offsets - Rewrite CPENABLE handling as static inlines - Use device_initcall() * Depend on !SMP for reason explained in the comments (Marc Gauthier) * Use XCHAL_CP_ID_XTIOP to enable/disable GPIO32 only Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12 17:18:41 +08:00
obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o
gpio: New driver for LSI ZEVIO SoCs This driver supports the GPIO controller found in LSI ZEVIO SoCs. It has been successfully tested on a TI nspire CX calculator. Signed-off-by: Fabian Vogt <fabian@ritter-vogt.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-25 03:54:58 +08:00
obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o
gpio: Add driver for Zynq GPIO controller Add support for GPIO controller used by Xilinx Zynq. v3 changes: - Use linux/gpio/driver.h instead of linux/gpio.h - Make irq a local variable in probe v2 changes: - convert to pm_runtime_force_(suspend|resume) - add pm_runtime_set_active in probe() - also (un)prepare clocks when they are dis-/enabled - add some missing calls to pm_runtime_get() - use pm_runtime_put() instead of sync variant - remove gpio chip in driver remove() - remove redundant type casts - directly use IO helpers - use BIT macro to set/clear bits - migrate to GPIOLIB_IRQCHIP Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-07-08 19:02:35 +08:00
obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
gpio: zx: Add ZTE zx296702 GPIO support Add ZTE zx296702 GPIO controller support Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-29 10:35:57 +08:00
obj-$(CONFIG_GPIO_ZX) += gpio-zx.o
gpio: Loongson1: add Loongson1 GPIO driver This patch adds GPIO driver for Loongson1B. Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-06 20:34:53 +08:00
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o