2005-04-17 06:20:36 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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2006-01-19 01:37:07 +08:00
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* Copyright (C) 2001, 06 by Ralf Baechle (ralf@linux-mips.org)
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2005-04-17 06:20:36 +08:00
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* Copyright (C) 2001 MIPS Technologies, Inc.
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*/
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#include <linux/kernel.h>
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2011-07-24 04:30:40 +08:00
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#include <linux/export.h>
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2006-01-19 01:37:07 +08:00
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#include <linux/pm.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/types.h>
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#include <linux/reboot.h>
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2015-03-26 01:25:44 +08:00
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#include <linux/delay.h>
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2006-01-19 01:37:07 +08:00
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2017-08-24 04:53:16 +08:00
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#include <asm/compiler.h>
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#include <asm/idle.h>
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#include <asm/mipsregs.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/reboot.h>
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/*
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* Urgs ... Too many MIPS machines to handle this in a generic way.
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* So handle all using function pointers to machine specific
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* functions.
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*/
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void (*_machine_restart)(char *command);
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void (*_machine_halt)(void);
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2006-01-19 01:37:07 +08:00
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void (*pm_power_off)(void);
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2005-04-17 06:20:36 +08:00
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2006-12-10 23:09:38 +08:00
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EXPORT_SYMBOL(pm_power_off);
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2017-08-24 04:53:16 +08:00
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static void machine_hang(void)
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{
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/*
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* We're hanging the system so we don't want to be interrupted anymore.
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* Any interrupt handlers that ran would at best be useless & at worst
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* go awry because the system isn't in a functional state.
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*/
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local_irq_disable();
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/*
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* Mask all interrupts, giving us a better chance of remaining in the
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* low power wait state.
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*/
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clear_c0_status(ST0_IM);
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while (true) {
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if (cpu_has_mips_r) {
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/*
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* We know that the wait instruction is supported so
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* make use of it directly, leaving interrupts
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* disabled.
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*/
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asm volatile(
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".set push\n\t"
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".set " MIPS_ISA_ARCH_LEVEL "\n\t"
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"wait\n\t"
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".set pop");
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} else if (cpu_wait) {
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/*
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* Try the cpu_wait() callback. This isn't ideal since
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* it'll re-enable interrupts, but that ought to be
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* harmless given that they're all masked.
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*/
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cpu_wait();
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local_irq_disable();
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} else {
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/*
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* We're going to burn some power running round the
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* loop, but we don't really have a choice. This isn't
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* a path we should expect to run for long during
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* typical use anyway.
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*/
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}
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/*
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* In most modern MIPS CPUs interrupts will cause the wait
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* instruction to graduate even when disabled, and in some
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* cases even when masked. In order to prevent a timer
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* interrupt from continuously taking us out of the low power
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* wait state, we clear any pending timer interrupt here.
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*/
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if (cpu_has_counter)
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write_c0_compare(0);
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}
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}
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2005-04-17 06:20:36 +08:00
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void machine_restart(char *command)
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{
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2006-01-18 05:14:01 +08:00
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if (_machine_restart)
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_machine_restart(command);
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2015-03-26 01:25:44 +08:00
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#ifdef CONFIG_SMP
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preempt_disable();
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smp_send_stop();
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#endif
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do_kernel_restart(command);
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mdelay(1000);
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pr_emerg("Reboot failed -- System halted\n");
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2017-08-24 04:53:16 +08:00
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machine_hang();
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2005-04-17 06:20:36 +08:00
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}
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void machine_halt(void)
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{
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2006-01-18 05:14:01 +08:00
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if (_machine_halt)
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_machine_halt();
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2015-03-26 01:25:44 +08:00
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#ifdef CONFIG_SMP
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preempt_disable();
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smp_send_stop();
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#endif
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2017-08-24 04:53:16 +08:00
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machine_hang();
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2005-04-17 06:20:36 +08:00
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}
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void machine_power_off(void)
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{
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2006-01-19 01:37:07 +08:00
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if (pm_power_off)
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pm_power_off();
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2015-03-26 01:25:44 +08:00
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#ifdef CONFIG_SMP
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preempt_disable();
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smp_send_stop();
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#endif
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2017-08-24 04:53:16 +08:00
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machine_hang();
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2005-04-17 06:20:36 +08:00
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}
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