2019-05-27 14:55:01 +08:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2017-02-08 17:50:51 +08:00
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/*
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* Code for Kernel probes Jump optimization.
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*
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* Copyright 2017, Anju T, IBM Corp.
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*/
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#include <linux/kprobes.h>
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#include <linux/jump_label.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <asm/kprobes.h>
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#include <asm/ptrace.h>
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#include <asm/cacheflush.h>
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#include <asm/code-patching.h>
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#include <asm/sstep.h>
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#include <asm/ppc-opcode.h>
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#define TMPL_CALL_HDLR_IDX \
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(optprobe_template_call_handler - optprobe_template_entry)
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#define TMPL_EMULATE_IDX \
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(optprobe_template_call_emulate - optprobe_template_entry)
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#define TMPL_RET_IDX \
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(optprobe_template_ret - optprobe_template_entry)
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#define TMPL_OP_IDX \
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(optprobe_template_op_address - optprobe_template_entry)
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#define TMPL_INSN_IDX \
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(optprobe_template_insn - optprobe_template_entry)
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#define TMPL_END_IDX \
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(optprobe_template_end - optprobe_template_entry)
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DEFINE_INSN_CACHE_OPS(ppc_optinsn);
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static bool insn_page_in_use;
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static void *__ppc_alloc_insn_page(void)
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{
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if (insn_page_in_use)
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return NULL;
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insn_page_in_use = true;
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return &optinsn_slot;
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}
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static void __ppc_free_insn_page(void *page __maybe_unused)
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{
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insn_page_in_use = false;
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}
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struct kprobe_insn_cache kprobe_ppc_optinsn_slots = {
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.mutex = __MUTEX_INITIALIZER(kprobe_ppc_optinsn_slots.mutex),
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.pages = LIST_HEAD_INIT(kprobe_ppc_optinsn_slots.pages),
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/* insn_size initialized later */
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.alloc = __ppc_alloc_insn_page,
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.free = __ppc_free_insn_page,
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.nr_garbage = 0,
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};
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/*
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* Check if we can optimize this probe. Returns NIP post-emulation if this can
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* be optimized and 0 otherwise.
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*/
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static unsigned long can_optimize(struct kprobe *p)
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{
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struct pt_regs regs;
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struct instruction_op op;
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unsigned long nip = 0;
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/*
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* kprobe placed for kretprobe during boot time
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2017-02-08 17:50:52 +08:00
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* has a 'nop' instruction, which can be emulated.
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* So further checks can be skipped.
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2017-02-08 17:50:51 +08:00
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*/
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if (p->addr == (kprobe_opcode_t *)&kretprobe_trampoline)
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2017-02-08 17:50:52 +08:00
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return (unsigned long)p->addr + sizeof(kprobe_opcode_t);
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2017-02-08 17:50:51 +08:00
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/*
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* We only support optimizing kernel addresses, but not
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* module addresses.
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*
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* FIXME: Optimize kprobes placed in module addresses.
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*/
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if (!is_kernel_addr((unsigned long)p->addr))
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return 0;
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memset(®s, 0, sizeof(struct pt_regs));
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regs.nip = (unsigned long)p->addr;
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regs.trap = 0x0;
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regs.msr = MSR_KERNEL;
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/*
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* Kprobe placed in conditional branch instructions are
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* not optimized, as we can't predict the nip prior with
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* dummy pt_regs and can not ensure that the return branch
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* from detour buffer falls in the range of address (i.e 32MB).
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* A branch back from trampoline is set up in the detour buffer
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* to the nip returned by the analyse_instr() here.
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*
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* Ensure that the instruction is not a conditional branch,
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* and that can be emulated.
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*/
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if (!is_conditional_branch(*p->ainsn.insn) &&
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2017-09-15 18:08:21 +08:00
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analyse_instr(&op, ®s, *p->ainsn.insn) == 1) {
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emulate_update_regs(®s, &op);
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2017-02-08 17:50:51 +08:00
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nip = regs.nip;
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2017-09-15 18:08:21 +08:00
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}
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2017-02-08 17:50:51 +08:00
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return nip;
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}
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static void optimized_callback(struct optimized_kprobe *op,
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struct pt_regs *regs)
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{
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/* This is possible if op is under delayed unoptimizing */
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if (kprobe_disabled(&op->kp))
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return;
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2017-10-24 00:37:38 +08:00
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preempt_disable();
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2017-02-08 17:50:51 +08:00
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if (kprobe_running()) {
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kprobes_inc_nmissed_count(&op->kp);
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} else {
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__this_cpu_write(current_kprobe, &op->kp);
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regs->nip = (unsigned long)op->kp.addr;
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2017-10-24 00:37:38 +08:00
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get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
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2017-02-08 17:50:51 +08:00
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opt_pre_handler(&op->kp, regs);
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__this_cpu_write(current_kprobe, NULL);
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}
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2017-10-24 00:37:38 +08:00
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preempt_enable_no_resched();
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2017-02-08 17:50:51 +08:00
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}
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NOKPROBE_SYMBOL(optimized_callback);
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void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
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{
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if (op->optinsn.insn) {
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free_ppc_optinsn_slot(op->optinsn.insn, 1);
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op->optinsn.insn = NULL;
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}
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}
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/*
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* emulate_step() requires insn to be emulated as
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* second parameter. Load register 'r4' with the
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* instruction.
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*/
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void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr)
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{
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/* addis r4,0,(insn)@h */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ADDIS | ___PPC_RT(4) |
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((val >> 16) & 0xffff));
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addr++;
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2017-02-08 17:50:51 +08:00
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/* ori r4,r4,(insn)@l */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(4) |
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___PPC_RS(4) | (val & 0xffff));
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2017-02-08 17:50:51 +08:00
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}
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/*
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* Generate instructions to load provided immediate 64-bit value
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* to register 'r3' and patch these instructions at 'addr'.
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*/
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void patch_imm64_load_insns(unsigned long val, kprobe_opcode_t *addr)
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{
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/* lis r3,(op)@highest */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ADDIS | ___PPC_RT(3) |
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((val >> 48) & 0xffff));
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addr++;
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2017-02-08 17:50:51 +08:00
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/* ori r3,r3,(op)@higher */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(3) |
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___PPC_RS(3) | ((val >> 32) & 0xffff));
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addr++;
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2017-02-08 17:50:51 +08:00
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/* rldicr r3,r3,32,31 */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_RLDICR | ___PPC_RA(3) |
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___PPC_RS(3) | __PPC_SH64(32) | __PPC_ME64(31));
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addr++;
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2017-02-08 17:50:51 +08:00
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/* oris r3,r3,(op)@h */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ORIS | ___PPC_RA(3) |
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___PPC_RS(3) | ((val >> 16) & 0xffff));
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addr++;
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2017-02-08 17:50:51 +08:00
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/* ori r3,r3,(op)@l */
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2017-06-06 12:29:39 +08:00
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patch_instruction(addr, PPC_INST_ORI | ___PPC_RA(3) |
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___PPC_RS(3) | (val & 0xffff));
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2017-02-08 17:50:51 +08:00
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}
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int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
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{
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kprobe_opcode_t *buff, branch_op_callback, branch_emulate_step;
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kprobe_opcode_t *op_callback_addr, *emulate_step_addr;
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long b_offset;
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2017-06-06 12:29:39 +08:00
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unsigned long nip, size;
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int rc, i;
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2017-02-08 17:50:51 +08:00
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kprobe_ppc_optinsn_slots.insn_size = MAX_OPTINSN_SIZE;
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nip = can_optimize(p);
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if (!nip)
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return -EILSEQ;
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/* Allocate instruction slot for detour buffer */
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buff = get_ppc_optinsn_slot();
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if (!buff)
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return -ENOMEM;
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/*
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* OPTPROBE uses 'b' instruction to branch to optinsn.insn.
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*
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* The target address has to be relatively nearby, to permit use
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* of branch instruction in powerpc, because the address is specified
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* in an immediate field in the instruction opcode itself, ie 24 bits
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* in the opcode specify the address. Therefore the address should
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* be within 32MB on either side of the current instruction.
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*/
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b_offset = (unsigned long)buff - (unsigned long)p->addr;
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if (!is_offset_in_branch_range(b_offset))
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goto error;
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/* Check if the return address is also within 32MB range */
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b_offset = (unsigned long)(buff + TMPL_RET_IDX) -
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(unsigned long)nip;
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if (!is_offset_in_branch_range(b_offset))
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goto error;
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/* Setup template */
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2017-06-06 12:29:39 +08:00
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/* We can optimize this via patch_instruction_window later */
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size = (TMPL_END_IDX * sizeof(kprobe_opcode_t)) / sizeof(int);
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pr_devel("Copying template to %p, size %lu\n", buff, size);
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for (i = 0; i < size; i++) {
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rc = patch_instruction(buff + i, *(optprobe_template_entry + i));
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if (rc < 0)
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goto error;
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}
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2017-02-08 17:50:51 +08:00
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/*
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* Fixup the template with instructions to:
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* 1. load the address of the actual probepoint
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*/
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patch_imm64_load_insns((unsigned long)op, buff + TMPL_OP_IDX);
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/*
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* 2. branch to optimized_callback() and emulate_step()
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*/
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2017-04-19 20:52:27 +08:00
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op_callback_addr = (kprobe_opcode_t *)ppc_kallsyms_lookup_name("optimized_callback");
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emulate_step_addr = (kprobe_opcode_t *)ppc_kallsyms_lookup_name("emulate_step");
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2017-02-08 17:50:51 +08:00
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if (!op_callback_addr || !emulate_step_addr) {
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2017-04-19 20:52:27 +08:00
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WARN(1, "Unable to lookup optimized_callback()/emulate_step()\n");
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2017-02-08 17:50:51 +08:00
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goto error;
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}
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branch_op_callback = create_branch((unsigned int *)buff + TMPL_CALL_HDLR_IDX,
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(unsigned long)op_callback_addr,
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BRANCH_SET_LINK);
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branch_emulate_step = create_branch((unsigned int *)buff + TMPL_EMULATE_IDX,
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(unsigned long)emulate_step_addr,
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BRANCH_SET_LINK);
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if (!branch_op_callback || !branch_emulate_step)
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goto error;
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2017-06-06 12:29:39 +08:00
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patch_instruction(buff + TMPL_CALL_HDLR_IDX, branch_op_callback);
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patch_instruction(buff + TMPL_EMULATE_IDX, branch_emulate_step);
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2017-02-08 17:50:51 +08:00
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/*
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* 3. load instruction to be emulated into relevant register, and
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*/
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patch_imm32_load_insns(*p->ainsn.insn, buff + TMPL_INSN_IDX);
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/*
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* 4. branch back from trampoline
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*/
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2017-06-06 12:29:39 +08:00
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patch_branch(buff + TMPL_RET_IDX, (unsigned long)nip, 0);
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2017-02-08 17:50:51 +08:00
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flush_icache_range((unsigned long)buff,
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(unsigned long)(&buff[TMPL_END_IDX]));
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op->optinsn.insn = buff;
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return 0;
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error:
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free_ppc_optinsn_slot(buff, 0);
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return -ERANGE;
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}
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int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
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{
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return optinsn->insn != NULL;
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}
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/*
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* On powerpc, Optprobes always replaces one instruction (4 bytes
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* aligned and 4 bytes long). It is impossible to encounter another
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* kprobe in this address range. So always return 0.
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*/
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int arch_check_optimized_kprobe(struct optimized_kprobe *op)
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{
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return 0;
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}
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void arch_optimize_kprobes(struct list_head *oplist)
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{
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struct optimized_kprobe *op;
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struct optimized_kprobe *tmp;
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list_for_each_entry_safe(op, tmp, oplist, list) {
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/*
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* Backup instructions which will be replaced
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* by jump address
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*/
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memcpy(op->optinsn.copied_insn, op->kp.addr,
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RELATIVEJUMP_SIZE);
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patch_instruction(op->kp.addr,
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create_branch((unsigned int *)op->kp.addr,
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(unsigned long)op->optinsn.insn, 0));
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list_del_init(&op->list);
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}
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}
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void arch_unoptimize_kprobe(struct optimized_kprobe *op)
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{
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arch_arm_kprobe(&op->kp);
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}
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void arch_unoptimize_kprobes(struct list_head *oplist,
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struct list_head *done_list)
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{
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struct optimized_kprobe *op;
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struct optimized_kprobe *tmp;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(op, tmp, oplist, list) {
|
|
|
|
arch_unoptimize_kprobe(op);
|
|
|
|
list_move(&op->list, done_list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int arch_within_optimized_kprobe(struct optimized_kprobe *op,
|
|
|
|
unsigned long addr)
|
|
|
|
{
|
|
|
|
return ((unsigned long)op->kp.addr <= addr &&
|
|
|
|
(unsigned long)op->kp.addr + RELATIVEJUMP_SIZE > addr);
|
|
|
|
}
|