280 lines
8.8 KiB
C
280 lines
8.8 KiB
C
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/* QLogic qed NIC Driver
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* Copyright (c) 2015 QLogic Corporation
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*
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* This software is available under the terms of the GNU General Public License
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* (GPL) Version 2, available from the file COPYING in the main directory of
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* this source tree.
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*/
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#ifndef __ETH_COMMON__
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#define __ETH_COMMON__
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/********************/
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/* ETH FW CONSTANTS */
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/********************/
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#define ETH_CACHE_LINE_SIZE 64
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#define ETH_MAX_RAMROD_PER_CON 8
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#define ETH_TX_BD_PAGE_SIZE_BYTES 4096
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#define ETH_RX_BD_PAGE_SIZE_BYTES 4096
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#define ETH_RX_SGE_PAGE_SIZE_BYTES 4096
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#define ETH_RX_CQE_PAGE_SIZE_BYTES 4096
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#define ETH_RX_NUM_NEXT_PAGE_BDS 2
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#define ETH_RX_NUM_NEXT_PAGE_SGES 2
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#define ETH_TX_MIN_BDS_PER_NON_LSO_PKT 1
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#define ETH_TX_MAX_BDS_PER_NON_LSO_PACKET 18
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#define ETH_TX_MAX_LSO_HDR_NBD 4
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#define ETH_TX_MIN_BDS_PER_LSO_PKT 3
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#define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3
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#define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2
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#define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2
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#define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 12 + 8))
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#define ETH_TX_MAX_LSO_HDR_BYTES 510
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#define ETH_NUM_STATISTIC_COUNTERS MAX_NUM_VPORTS
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#define ETH_REG_CQE_PBL_SIZE 3
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/* num of MAC/VLAN filters */
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#define ETH_NUM_MAC_FILTERS 512
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#define ETH_NUM_VLAN_FILTERS 512
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/* approx. multicast constants */
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#define ETH_MULTICAST_BIN_FROM_MAC_SEED 0
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#define ETH_MULTICAST_MAC_BINS 256
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#define ETH_MULTICAST_MAC_BINS_IN_REGS (ETH_MULTICAST_MAC_BINS / 32)
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/* ethernet vport update constants */
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#define ETH_FILTER_RULES_COUNT 10
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#define ETH_RSS_IND_TABLE_ENTRIES_NUM 128
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#define ETH_RSS_KEY_SIZE_REGS 10
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#define ETH_RSS_ENGINE_NUM_K2 207
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#define ETH_RSS_ENGINE_NUM_BB 127
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/* TPA constants */
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#define ETH_TPA_MAX_AGGS_NUM 64
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#define ETH_TPA_CQE_START_SGL_SIZE 3
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#define ETH_TPA_CQE_CONT_SGL_SIZE 6
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#define ETH_TPA_CQE_END_SGL_SIZE 4
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/* Queue Zone sizes */
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#define TSTORM_QZONE_SIZE 0
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#define MSTORM_QZONE_SIZE sizeof(struct mstorm_eth_queue_zone)
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#define USTORM_QZONE_SIZE sizeof(struct ustorm_eth_queue_zone)
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#define XSTORM_QZONE_SIZE 0
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#define YSTORM_QZONE_SIZE sizeof(struct ystorm_eth_queue_zone)
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#define PSTORM_QZONE_SIZE 0
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/* Interrupt coalescing TimeSet */
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struct coalescing_timeset {
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u8 timeset;
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u8 valid;
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};
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struct eth_tx_1st_bd_flags {
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u8 bitfields;
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#define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT 0
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#define ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT 1
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#define ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT 2
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#define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT 3
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#define ETH_TX_1ST_BD_FLAGS_LSO_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_LSO_SHIFT 4
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#define ETH_TX_1ST_BD_FLAGS_START_BD_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT 5
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#define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT 6
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#define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK 0x1
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#define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT 7
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};
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/* The parsing information data fo rthe first tx bd of a given packet. */
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struct eth_tx_data_1st_bd {
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__le16 vlan;
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u8 nbds;
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struct eth_tx_1st_bd_flags bd_flags;
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__le16 fw_use_only;
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};
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/* The parsing information data for the second tx bd of a given packet. */
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struct eth_tx_data_2nd_bd {
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__le16 tunn_ip_size;
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__le16 bitfields;
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#define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK 0x1FFF
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#define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT 0
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#define ETH_TX_DATA_2ND_BD_RESERVED0_MASK 0x7
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#define ETH_TX_DATA_2ND_BD_RESERVED0_SHIFT 13
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__le16 bitfields2;
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_MASK 0xF
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4
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#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3
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#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6
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#define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3
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#define ETH_TX_DATA_2ND_BD_TUNN_TYPE_SHIFT 8
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_SHIFT 10
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#define ETH_TX_DATA_2ND_BD_IPV6_EXT_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT 11
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#define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_SHIFT 12
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#define ETH_TX_DATA_2ND_BD_L4_UDP_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT 13
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#define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT 14
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#define ETH_TX_DATA_2ND_BD_RESERVED1_MASK 0x1
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#define ETH_TX_DATA_2ND_BD_RESERVED1_SHIFT 15
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};
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/* Regular ETH Rx FP CQE. */
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struct eth_fast_path_rx_reg_cqe {
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u8 type;
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u8 bitfields;
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#define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_MASK 0x7
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#define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_SHIFT 0
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#define ETH_FAST_PATH_RX_REG_CQE_TC_MASK 0xF
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#define ETH_FAST_PATH_RX_REG_CQE_TC_SHIFT 3
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#define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_MASK 0x1
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#define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_SHIFT 7
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__le16 pkt_len;
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struct parsing_and_err_flags pars_flags;
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__le16 vlan_tag;
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__le32 rss_hash;
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__le16 len_on_bd;
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u8 placement_offset;
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u8 reserved;
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__le16 pbl[ETH_REG_CQE_PBL_SIZE];
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u8 reserved1[10];
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};
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/* The L4 pseudo checksum mode for Ethernet */
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enum eth_l4_pseudo_checksum_mode {
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ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH,
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ETH_L4_PSEUDO_CSUM_ZERO_LENGTH,
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MAX_ETH_L4_PSEUDO_CHECKSUM_MODE
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};
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struct eth_rx_bd {
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struct regpair addr;
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};
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/* regular ETH Rx SP CQE */
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struct eth_slow_path_rx_cqe {
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u8 type;
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u8 ramrod_cmd_id;
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u8 error_flag;
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u8 reserved[27];
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__le16 echo;
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};
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/* union for all ETH Rx CQE types */
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union eth_rx_cqe {
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struct eth_fast_path_rx_reg_cqe fast_path_regular;
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struct eth_slow_path_rx_cqe slow_path;
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};
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/* ETH Rx CQE type */
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enum eth_rx_cqe_type {
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ETH_RX_CQE_TYPE_UNUSED,
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ETH_RX_CQE_TYPE_REGULAR,
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ETH_RX_CQE_TYPE_SLOW_PATH,
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MAX_ETH_RX_CQE_TYPE
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};
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/* ETH Rx producers data */
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struct eth_rx_prod_data {
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__le16 bd_prod;
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__le16 sge_prod;
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__le16 cqe_prod;
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__le16 reserved;
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};
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/* The first tx bd of a given packet */
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struct eth_tx_1st_bd {
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struct regpair addr;
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__le16 nbytes;
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struct eth_tx_data_1st_bd data;
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};
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/* The second tx bd of a given packet */
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struct eth_tx_2nd_bd {
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struct regpair addr;
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__le16 nbytes;
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struct eth_tx_data_2nd_bd data;
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};
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/* The parsing information data for the third tx bd of a given packet. */
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struct eth_tx_data_3rd_bd {
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__le16 lso_mss;
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u8 bitfields;
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#define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK 0xF
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#define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT 0
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#define ETH_TX_DATA_3RD_BD_HDR_NBD_MASK 0xF
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#define ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT 4
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u8 resereved0[3];
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};
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/* The third tx bd of a given packet */
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struct eth_tx_3rd_bd {
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struct regpair addr;
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__le16 nbytes;
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struct eth_tx_data_3rd_bd data;
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};
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/* The common non-special TX BD ring element */
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struct eth_tx_bd {
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struct regpair addr;
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__le16 nbytes;
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__le16 reserved0;
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__le32 reserved1;
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};
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union eth_tx_bd_types {
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struct eth_tx_1st_bd first_bd;
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struct eth_tx_2nd_bd second_bd;
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struct eth_tx_3rd_bd third_bd;
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struct eth_tx_bd reg_bd;
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};
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/* Mstorm Queue Zone */
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struct mstorm_eth_queue_zone {
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struct eth_rx_prod_data rx_producers;
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__le32 reserved[2];
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};
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/* Ustorm Queue Zone */
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struct ustorm_eth_queue_zone {
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struct coalescing_timeset int_coalescing_timeset;
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__le16 reserved[3];
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};
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/* Ystorm Queue Zone */
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struct ystorm_eth_queue_zone {
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struct coalescing_timeset int_coalescing_timeset;
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__le16 reserved[3];
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};
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/* ETH doorbell data */
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struct eth_db_data {
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u8 params;
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#define ETH_DB_DATA_DEST_MASK 0x3
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#define ETH_DB_DATA_DEST_SHIFT 0
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#define ETH_DB_DATA_AGG_CMD_MASK 0x3
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#define ETH_DB_DATA_AGG_CMD_SHIFT 2
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#define ETH_DB_DATA_BYPASS_EN_MASK 0x1
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#define ETH_DB_DATA_BYPASS_EN_SHIFT 4
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#define ETH_DB_DATA_RESERVED_MASK 0x1
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#define ETH_DB_DATA_RESERVED_SHIFT 5
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#define ETH_DB_DATA_AGG_VAL_SEL_MASK 0x3
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#define ETH_DB_DATA_AGG_VAL_SEL_SHIFT 6
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u8 agg_flags;
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__le16 bd_prod;
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};
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#endif /* __ETH_COMMON__ */
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