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linux-sg2042
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4d7d39a18b
linux-sg2042
/
drivers
/
clk
/
zte
/
Makefile
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clk: zx: Add audio div clock method for zx296702 Add SPDIF/I2S divider clock method for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-23 15:02:51 +08:00
obj-y
:=
clk.o
clk: zx: add clock support to zx296702 It adds a clock driver for zx296702 SoC to register the clock tree to Common Clock Framework. All the clocks of bus topology and some the peripheral clocks are ready with this commit. Some missing leaf clocks for peripherals will be added later when needed. Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-06-04 11:21:01 +08:00
obj-$(CONFIG_SOC_ZX296702)
+=
clk-zx296702.o
clk: zx: register ZX296718 clocks The ZX296718 clocks are statically listed and registered. More clock will be added later. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-06 14:02:42 +08:00
obj-$(CONFIG_ARCH_ZX)
+=
clk-zx296718.o