2013-01-11 15:46:19 +08:00
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/*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2014-07-17 19:17:24 +08:00
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#ifndef __SOC_TEGRA_FUSE_H__
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#define __SOC_TEGRA_FUSE_H__
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2013-01-11 15:46:19 +08:00
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2014-07-11 15:52:41 +08:00
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#define TEGRA20 0x20
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#define TEGRA30 0x30
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#define TEGRA114 0x35
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#define TEGRA124 0x40
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#ifndef __ASSEMBLY__
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2013-01-11 15:46:19 +08:00
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u32 tegra_read_chipid(void);
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2014-07-11 15:52:41 +08:00
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u8 tegra_get_chip_id(void);
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2014-06-12 23:36:35 +08:00
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#if defined(CONFIG_TEGRA20_APB_DMA)
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int tegra_apb_readl_using_dma(unsigned long offset, u32 *value);
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int tegra_apb_writel_using_dma(u32 value, unsigned long offset);
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#else
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static inline int tegra_apb_readl_using_dma(unsigned long offset, u32 *value)
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{
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return -EINVAL;
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}
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static inline int tegra_apb_writel_using_dma(u32 value, unsigned long offset)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_TEGRA20_APB_DMA */
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2014-07-11 15:52:41 +08:00
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#endif /* __ASSEMBLY__ */
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2013-01-11 15:46:19 +08:00
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2014-07-17 19:17:24 +08:00
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#endif /* __SOC_TEGRA_FUSE_H__ */
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