linux-sg2042/drivers/clk/meson/Makefile

#
# Makefile for Meson specific clk
#

obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-audio-divider.o
obj-$(CONFIG_COMMON_CLK_MESON_AO) += meson-aoclk.o
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
obj-$(CONFIG_COMMON_CLK_GXBB)	 += gxbb.o gxbb-aoclk.o gxbb-aoclk-32k.o
obj-$(CONFIG_COMMON_CLK_AXG)	 += axg.o axg-aoclk.o
obj-$(CONFIG_COMMON_CLK_REGMAP_MESON)	+= clk-regmap.o
clk: meson: Add support for Meson clock controller This patchset adds the infrastructure for registering and managing the core clocks found on Amlogic MesonX SoCs. In particular: - PLLs - CPU clock - Fixed rate clocks, fixed factor clocks, ... Signed-off-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> 2015-06-01 19:13:53 +08:00			`#`
			`# Makefile for Meson specific clk`
			`#`

clk: meson: remove obsolete cpu_clk meson8b cpu_clk has been replaced by a set of divider and mux clocks. meson_cpu_clk is no longer used and can be removed Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 2018-02-12 22:58:45 +08:00			`obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-audio-divider.o`
clk: meson: aoclk: refactor common code into dedicated file We try to refactor the common code into one dedicated file, while preparing to add new Meson-AXG aoclk driver, this would help us to better share the code by all aoclk drivers. Suggested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> 2018-05-03 21:26:20 +08:00			`obj-$(CONFIG_COMMON_CLK_MESON_AO) += meson-aoclk.o`
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1472319654-59048-2-git-send-email-serveralex@gmail.com 2016-08-28 01:40:49 +08:00			`obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o`
clk: meson: switch gxbb ao_clk to clk_regmap Drop the gxbb ao specific regmap based clock and use the meson clk_regmap based clock instead. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 2018-02-12 22:58:33 +08:00			`obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o gxbb-aoclk-32k.o`
clk: meson-axg: Add AO Clock and Reset controller driver Adds a Clock and Reset controller driver for the Always-On part of the Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> 2018-05-03 21:26:23 +08:00			`obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o`
clk: meson: add regmap clocks Meson clock controllers need to move the classical iomem registers to regmap. This is triggered because the HHI controllers found on the GXBB and GXL host more than just clocks. To properly handle this, we would like to migrate HHI to syscon. Also GXBB AO clock controller already use regmap, AXG AO and Audio clock controllers will as well. The purpose of this change is to provide a common structure to these meson controllers (and possibly others) for regmap based clocks. This change provides the basic gate, mux and divider, based on the helpers provided by the related generic clocks Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 2018-02-12 22:58:32 +08:00			`obj-$(CONFIG_COMMON_CLK_REGMAP_MESON) += clk-regmap.o`