2012-07-31 22:16:24 +08:00
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/*
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* VFIO PCI I/O Port & MMIO access
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*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from original vfio:
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* Copyright 2010 Cisco Systems, Inc. All rights reserved.
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* Author: Tom Lyon, pugs@cisco.com
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*/
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#include <linux/fs.h>
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#include <linux/pci.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include "vfio_pci_private.h"
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2013-02-15 05:02:12 +08:00
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/*
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* Read or write from an __iomem region (MMIO or I/O port) with an excluded
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* range which is inaccessible. The excluded range drops writes and fills
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* reads with -1. This is intended for handling MSI-X vector tables and
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* leftover space for ROM BARs.
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*/
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static ssize_t do_io_rw(void __iomem *io, char __user *buf,
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loff_t off, size_t count, size_t x_start,
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size_t x_end, bool iswrite)
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2012-07-31 22:16:24 +08:00
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{
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2013-02-15 05:02:12 +08:00
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ssize_t done = 0;
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2012-07-31 22:16:24 +08:00
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while (count) {
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2013-02-15 05:02:12 +08:00
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size_t fillable, filled;
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if (off < x_start)
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fillable = min(count, (size_t)(x_start - off));
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else if (off >= x_end)
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fillable = count;
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else
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fillable = 0;
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2012-07-31 22:16:24 +08:00
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2013-02-15 05:02:12 +08:00
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if (fillable >= 4 && !(off % 4)) {
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2012-07-31 22:16:24 +08:00
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__le32 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 4))
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return -EFAULT;
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2013-02-15 05:02:12 +08:00
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iowrite32(le32_to_cpu(val), io + off);
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2012-07-31 22:16:24 +08:00
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} else {
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2013-02-15 05:02:12 +08:00
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val = cpu_to_le32(ioread32(io + off));
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2012-07-31 22:16:24 +08:00
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if (copy_to_user(buf, &val, 4))
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return -EFAULT;
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}
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filled = 4;
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2013-02-15 05:02:12 +08:00
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} else if (fillable >= 2 && !(off % 2)) {
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2012-07-31 22:16:24 +08:00
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__le16 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 2))
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return -EFAULT;
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2013-02-15 05:02:12 +08:00
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iowrite16(le16_to_cpu(val), io + off);
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2012-07-31 22:16:24 +08:00
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} else {
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2013-02-15 05:02:12 +08:00
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val = cpu_to_le16(ioread16(io + off));
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2012-07-31 22:16:24 +08:00
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if (copy_to_user(buf, &val, 2))
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return -EFAULT;
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}
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filled = 2;
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2013-02-15 05:02:12 +08:00
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} else if (fillable) {
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2012-07-31 22:16:24 +08:00
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u8 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 1))
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return -EFAULT;
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2013-02-15 05:02:12 +08:00
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iowrite8(val, io + off);
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2012-07-31 22:16:24 +08:00
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} else {
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2013-02-15 05:02:12 +08:00
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val = ioread8(io + off);
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2012-07-31 22:16:24 +08:00
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if (copy_to_user(buf, &val, 1))
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return -EFAULT;
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}
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filled = 1;
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2013-02-15 05:02:12 +08:00
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} else {
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/* Fill reads with -1, drop writes */
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filled = min(count, (size_t)(x_end - off));
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if (!iswrite) {
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u8 val = 0xFF;
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size_t i;
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for (i = 0; i < filled; i++)
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if (copy_to_user(buf + i, &val, 1))
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return -EFAULT;
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}
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2012-07-31 22:16:24 +08:00
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}
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count -= filled;
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done += filled;
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2013-02-15 05:02:12 +08:00
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off += filled;
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2012-07-31 22:16:24 +08:00
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buf += filled;
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}
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return done;
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}
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2013-02-15 05:02:12 +08:00
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ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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2012-07-31 22:16:24 +08:00
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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2013-02-15 05:02:12 +08:00
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size_t x_start = 0, x_end = 0;
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2012-07-31 22:16:24 +08:00
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resource_size_t end;
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2013-02-15 05:02:12 +08:00
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void __iomem *io;
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ssize_t done;
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2012-07-31 22:16:24 +08:00
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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end = pci_resource_len(pdev, bar);
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2013-02-15 05:02:12 +08:00
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if (pos >= end)
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2012-07-31 22:16:24 +08:00
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return -EINVAL;
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2013-02-15 05:02:12 +08:00
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count = min(count, (size_t)(end - pos));
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2012-07-31 22:16:24 +08:00
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if (bar == PCI_ROM_RESOURCE) {
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2013-02-15 05:02:12 +08:00
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/*
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* The ROM can fill less space than the BAR, so we start the
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* excluded range at the end of the actual ROM. This makes
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* filling large ROM BARs much faster.
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*/
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2012-07-31 22:16:24 +08:00
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io = pci_map_rom(pdev, &x_start);
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2013-02-15 05:02:12 +08:00
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if (!io)
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return -ENOMEM;
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2012-07-31 22:16:24 +08:00
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x_end = end;
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2013-02-15 05:02:12 +08:00
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} else if (!vdev->barmap[bar]) {
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int ret;
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2012-07-31 22:16:24 +08:00
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2013-02-15 05:02:12 +08:00
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ret = pci_request_selected_regions(pdev, 1 << bar, "vfio");
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if (ret)
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return ret;
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2012-07-31 22:16:24 +08:00
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2013-02-15 05:02:12 +08:00
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io = pci_iomap(pdev, bar, 0);
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if (!io) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -ENOMEM;
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2012-07-31 22:16:24 +08:00
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}
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2013-02-15 05:02:12 +08:00
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vdev->barmap[bar] = io;
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} else
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2012-07-31 22:16:24 +08:00
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io = vdev->barmap[bar];
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2013-02-15 05:02:12 +08:00
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if (bar == vdev->msix_bar) {
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x_start = vdev->msix_offset;
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x_end = vdev->msix_offset + vdev->msix_size;
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2012-07-31 22:16:24 +08:00
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}
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2013-02-15 05:02:12 +08:00
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done = do_io_rw(io, buf, pos, count, x_start, x_end, iswrite);
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2012-07-31 22:16:24 +08:00
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2013-02-15 05:02:12 +08:00
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if (done >= 0)
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*ppos += done;
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2012-07-31 22:16:24 +08:00
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if (bar == PCI_ROM_RESOURCE)
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pci_unmap_rom(pdev, io);
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2013-02-15 05:02:12 +08:00
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return done;
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2012-07-31 22:16:24 +08:00
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}
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