2009-04-02 23:38:41 +08:00
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/*
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* RNG driver for Freescale RNGA
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*
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* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*
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* This driver is based on other RNG drivers.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/hw_random.h>
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2012-06-14 00:15:34 +08:00
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#include <linux/delay.h>
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2009-04-02 23:38:41 +08:00
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#include <linux/io.h>
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/* RNGA Registers */
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#define RNGA_CONTROL 0x00
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#define RNGA_STATUS 0x04
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#define RNGA_ENTROPY 0x08
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#define RNGA_OUTPUT_FIFO 0x0c
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#define RNGA_MODE 0x10
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#define RNGA_VERIFICATION_CONTROL 0x14
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#define RNGA_OSC_CONTROL_COUNTER 0x18
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#define RNGA_OSC1_COUNTER 0x1c
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#define RNGA_OSC2_COUNTER 0x20
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#define RNGA_OSC_COUNTER_STATUS 0x24
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/* RNGA Registers Range */
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#define RNG_ADDR_RANGE 0x28
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/* RNGA Control Register */
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#define RNGA_CONTROL_SLEEP 0x00000010
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#define RNGA_CONTROL_CLEAR_INT 0x00000008
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#define RNGA_CONTROL_MASK_INTS 0x00000004
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#define RNGA_CONTROL_HIGH_ASSURANCE 0x00000002
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#define RNGA_CONTROL_GO 0x00000001
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#define RNGA_STATUS_LEVEL_MASK 0x0000ff00
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/* RNGA Status Register */
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#define RNGA_STATUS_OSC_DEAD 0x80000000
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#define RNGA_STATUS_SLEEP 0x00000010
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#define RNGA_STATUS_ERROR_INT 0x00000008
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#define RNGA_STATUS_FIFO_UNDERFLOW 0x00000004
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#define RNGA_STATUS_LAST_READ_STATUS 0x00000002
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#define RNGA_STATUS_SECURITY_VIOLATION 0x00000001
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2012-09-05 05:35:22 +08:00
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struct mxc_rng {
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struct device *dev;
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struct hwrng rng;
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void __iomem *mem;
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struct clk *clk;
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};
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2009-04-02 23:38:41 +08:00
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2012-06-14 00:15:34 +08:00
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static int mxc_rnga_data_present(struct hwrng *rng, int wait)
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2009-04-02 23:38:41 +08:00
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{
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2012-06-14 00:15:34 +08:00
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int i;
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
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2012-06-14 00:15:34 +08:00
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for (i = 0; i < 20; i++) {
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/* how many random numbers are in FIFO? [0-16] */
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2012-09-05 05:35:22 +08:00
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int level = (__raw_readl(mxc_rng->mem + RNGA_STATUS) &
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2012-06-14 00:15:34 +08:00
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RNGA_STATUS_LEVEL_MASK) >> 8;
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if (level || !wait)
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return !!level;
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udelay(10);
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}
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return 0;
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2009-04-02 23:38:41 +08:00
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}
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static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
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{
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int err;
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u32 ctrl;
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
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2009-04-02 23:38:41 +08:00
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/* retrieve a random number from FIFO */
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2012-09-05 05:35:22 +08:00
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*data = __raw_readl(mxc_rng->mem + RNGA_OUTPUT_FIFO);
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2009-04-02 23:38:41 +08:00
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/* some error while reading this random number? */
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2012-09-05 05:35:22 +08:00
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err = __raw_readl(mxc_rng->mem + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
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2009-04-02 23:38:41 +08:00
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/* if error: clear error interrupt, but doesn't return random number */
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if (err) {
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2012-09-05 05:35:22 +08:00
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dev_dbg(mxc_rng->dev, "Error while reading random number!\n");
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ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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__raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT,
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2012-09-05 05:35:22 +08:00
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mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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return 0;
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} else
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return 4;
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}
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static int mxc_rnga_init(struct hwrng *rng)
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{
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u32 ctrl, osc;
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
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2009-04-02 23:38:41 +08:00
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/* wake up */
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2012-09-05 05:35:22 +08:00
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ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
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__raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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/* verify if oscillator is working */
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2012-09-05 05:35:22 +08:00
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osc = __raw_readl(mxc_rng->mem + RNGA_STATUS);
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2009-04-02 23:38:41 +08:00
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if (osc & RNGA_STATUS_OSC_DEAD) {
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2012-09-05 05:35:22 +08:00
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dev_err(mxc_rng->dev, "RNGA Oscillator is dead!\n");
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2009-04-02 23:38:41 +08:00
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return -ENODEV;
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}
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/* go running */
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2012-09-05 05:35:22 +08:00
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ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
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__raw_writel(ctrl | RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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return 0;
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}
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static void mxc_rnga_cleanup(struct hwrng *rng)
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{
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u32 ctrl;
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng = container_of(rng, struct mxc_rng, rng);
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2009-04-02 23:38:41 +08:00
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2012-09-05 05:35:22 +08:00
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ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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/* stop rnga */
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2012-09-05 05:35:22 +08:00
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__raw_writel(ctrl & ~RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL);
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2009-04-02 23:38:41 +08:00
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}
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static int __init mxc_rnga_probe(struct platform_device *pdev)
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{
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2015-09-13 07:19:51 +08:00
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int err;
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2013-03-13 11:57:27 +08:00
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struct resource *res;
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng;
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2015-09-13 07:19:53 +08:00
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mxc_rng = devm_kzalloc(&pdev->dev, sizeof(*mxc_rng), GFP_KERNEL);
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2012-09-05 05:35:22 +08:00
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if (!mxc_rng)
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return -ENOMEM;
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mxc_rng->dev = &pdev->dev;
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mxc_rng->rng.name = "mxc-rnga";
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mxc_rng->rng.init = mxc_rnga_init;
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mxc_rng->rng.cleanup = mxc_rnga_cleanup,
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mxc_rng->rng.data_present = mxc_rnga_data_present,
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mxc_rng->rng.data_read = mxc_rnga_data_read,
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mxc_rng->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(mxc_rng->clk)) {
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2009-04-02 23:38:41 +08:00
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dev_err(&pdev->dev, "Could not get rng_clk!\n");
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2015-09-13 07:19:50 +08:00
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return PTR_ERR(mxc_rng->clk);
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2009-04-02 23:38:41 +08:00
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}
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2013-07-22 01:41:38 +08:00
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err = clk_prepare_enable(mxc_rng->clk);
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if (err)
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2015-09-13 07:19:50 +08:00
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return err;
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2009-04-02 23:38:41 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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2013-03-13 11:57:27 +08:00
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mxc_rng->mem = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(mxc_rng->mem)) {
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err = PTR_ERR(mxc_rng->mem);
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2009-04-02 23:38:41 +08:00
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goto err_ioremap;
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}
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2012-09-05 05:35:22 +08:00
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err = hwrng_register(&mxc_rng->rng);
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2009-04-02 23:38:41 +08:00
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if (err) {
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dev_err(&pdev->dev, "MXC RNGA registering failed (%d)\n", err);
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2012-09-05 05:35:22 +08:00
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goto err_ioremap;
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2009-04-02 23:38:41 +08:00
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}
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return 0;
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err_ioremap:
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2012-09-05 05:35:22 +08:00
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clk_disable_unprepare(mxc_rng->clk);
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2009-04-02 23:38:41 +08:00
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return err;
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}
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static int __exit mxc_rnga_remove(struct platform_device *pdev)
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{
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2012-09-05 05:35:22 +08:00
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struct mxc_rng *mxc_rng = platform_get_drvdata(pdev);
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2009-04-02 23:38:41 +08:00
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2012-09-05 05:35:22 +08:00
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hwrng_unregister(&mxc_rng->rng);
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2009-04-02 23:38:41 +08:00
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2012-09-05 05:35:22 +08:00
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clk_disable_unprepare(mxc_rng->clk);
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2009-04-02 23:38:41 +08:00
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return 0;
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}
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static struct platform_driver mxc_rnga_driver = {
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.driver = {
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.name = "mxc_rnga",
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},
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.remove = __exit_p(mxc_rnga_remove),
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};
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2013-03-15 01:09:33 +08:00
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module_platform_driver_probe(mxc_rnga_driver, mxc_rnga_probe);
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2009-04-02 23:38:41 +08:00
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MODULE_AUTHOR("Freescale Semiconductor, Inc.");
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MODULE_DESCRIPTION("H/W RNGA driver for i.MX");
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MODULE_LICENSE("GPL");
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