2005-04-17 06:20:36 +08:00
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#ifndef __ASM_CPU_SH4_DMA_H
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#define __ASM_CPU_SH4_DMA_H
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2012-05-18 16:27:28 +08:00
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#include <linux/sh_intc.h>
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2009-03-10 16:26:49 +08:00
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/*
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* SH7750/SH7751/SH7760
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*/
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2012-05-18 16:27:28 +08:00
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#define DMTE0_IRQ evt2irq(0x640)
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#define DMTE4_IRQ evt2irq(0x780)
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#define DMTE6_IRQ evt2irq(0x7c0)
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#define DMAE0_IRQ evt2irq(0x6c0)
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2005-04-17 06:20:36 +08:00
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2009-03-10 16:26:49 +08:00
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#define SH_DMAC_BASE0 0xffa00000
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#define SH_DMAC_BASE1 0xffa00070
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2012-05-19 17:06:12 +08:00
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2006-01-17 14:14:09 +08:00
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#endif /* __ASM_CPU_SH4_DMA_H */
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