blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
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/*
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* File: arch/blackfin/kernel/dma-mapping.c
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* Based on:
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* Author:
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*
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* Created:
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* Description: Dynamic DMA mapping support.
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/spinlock.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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2007-07-12 22:58:21 +08:00
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#include <linux/io.h>
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blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 05:50:22 +08:00
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#include <asm/cacheflush.h>
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#include <asm/bfin-global.h>
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static spinlock_t dma_page_lock;
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static unsigned int *dma_page;
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static unsigned int dma_pages;
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static unsigned long dma_base;
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static unsigned long dma_size;
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static unsigned int dma_initialized;
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void dma_alloc_init(unsigned long start, unsigned long end)
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{
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spin_lock_init(&dma_page_lock);
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dma_initialized = 0;
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dma_page = (unsigned int *)__get_free_page(GFP_KERNEL);
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memset(dma_page, 0, PAGE_SIZE);
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dma_base = PAGE_ALIGN(start);
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dma_size = PAGE_ALIGN(end) - PAGE_ALIGN(start);
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dma_pages = dma_size >> PAGE_SHIFT;
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memset((void *)dma_base, 0, DMA_UNCACHED_REGION);
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dma_initialized = 1;
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printk(KERN_INFO "%s: dma_page @ 0x%p - %d pages at 0x%08lx\n", __FUNCTION__,
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dma_page, dma_pages, dma_base);
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}
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static inline unsigned int get_pages(size_t size)
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{
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return ((size - 1) >> PAGE_SHIFT) + 1;
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}
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static unsigned long __alloc_dma_pages(unsigned int pages)
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{
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unsigned long ret = 0, flags;
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int i, count = 0;
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if (dma_initialized == 0)
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dma_alloc_init(_ramend - DMA_UNCACHED_REGION, _ramend);
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spin_lock_irqsave(&dma_page_lock, flags);
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for (i = 0; i < dma_pages;) {
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if (dma_page[i++] == 0) {
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if (++count == pages) {
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while (count--)
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dma_page[--i] = 1;
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ret = dma_base + (i << PAGE_SHIFT);
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break;
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}
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} else
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count = 0;
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}
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spin_unlock_irqrestore(&dma_page_lock, flags);
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return ret;
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}
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static void __free_dma_pages(unsigned long addr, unsigned int pages)
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{
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unsigned long page = (addr - dma_base) >> PAGE_SHIFT;
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unsigned long flags;
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int i;
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if ((page + pages) > dma_pages) {
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printk(KERN_ERR "%s: freeing outside range.\n", __FUNCTION__);
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BUG();
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}
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spin_lock_irqsave(&dma_page_lock, flags);
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for (i = page; i < page + pages; i++) {
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dma_page[i] = 0;
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}
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spin_unlock_irqrestore(&dma_page_lock, flags);
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}
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t * dma_handle, gfp_t gfp)
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{
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void *ret;
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ret = (void *)__alloc_dma_pages(get_pages(size));
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if (ret) {
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memset(ret, 0, size);
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*dma_handle = virt_to_phys(ret);
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}
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void
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dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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__free_dma_pages((unsigned long)vaddr, get_pages(size));
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}
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EXPORT_SYMBOL(dma_free_coherent);
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/*
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* Dummy functions defined for some existing drivers
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*/
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dma_addr_t
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dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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invalidate_dcache_range((unsigned long)ptr,
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(unsigned long)ptr + size);
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return (dma_addr_t) ptr;
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}
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EXPORT_SYMBOL(dma_map_single);
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int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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{
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nents; i++)
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invalidate_dcache_range(sg_dma_address(&sg[i]),
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sg_dma_address(&sg[i]) +
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sg_dma_len(&sg[i]));
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return nents;
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}
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EXPORT_SYMBOL(dma_map_sg);
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void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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EXPORT_SYMBOL(dma_unmap_single);
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void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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}
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EXPORT_SYMBOL(dma_unmap_sg);
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