Add support for quiet and json listing of rasm2 -L and e asm.arch=?
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@ -15,6 +15,7 @@ static RAsm *a = NULL;
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static RAnal *anal = NULL;
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static int coutput = false;
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static bool json = false;
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static bool quiet = false;
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static int showanal(RAnal *lanal, RAnalOp *op, ut64 offset, ut8 *buf, int len, bool json);
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@ -68,6 +69,9 @@ static void rasm2_list(RAsm *la, const char *arch) {
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const char *feat2, *feat;
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RAsmPlugin *h;
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RListIter *iter;
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if (json) {
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printf ("{");
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}
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r_list_foreach (a->plugins, iter, h) {
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if (arch) {
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if (h->cpus && !strcmp (arch, h->name)) {
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@ -89,11 +93,23 @@ static void rasm2_list(RAsm *la, const char *arch) {
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if (h->assemble && !h->disassemble) feat = "a_";
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if (!h->assemble && h->disassemble) feat = "_d";
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feat2 = has_esil (anal, h->name);
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printf ("%s%s %-9s %-11s %-7s %s\n",
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feat, feat2, bits, h->name,
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h->license? h->license: "unknown", h->desc);
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if (quiet) {
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printf ("%s\n", h->name);
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} else if (json) {
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const char *str_bits = "32, 64";
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const char *license = "GPL";
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printf ("\"%s\":{\"bits\":[%s],\"license\":\"%s\",\"description\":\"%s\",\"features\":\"%s\"}%s",
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h->name, str_bits, license, h->desc, feat, iter->n? ",": "");
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} else {
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printf ("%s%s %-9s %-11s %-7s %s\n",
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feat, feat2, bits, h->name,
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h->license? h->license: "unknown", h->desc);
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}
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}
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}
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if (json) {
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printf ("}\n");
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}
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}
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// TODO: move into libr/anal/stack.c ?
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@ -184,6 +200,7 @@ static int rasm_show_help(int v) {
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" -B Binary input/output (-l is mandatory for binary input)\n"
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" -v Show version information\n"
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" -w What's this instruction for? describe opcode\n"
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" -q quiet mode\n"
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" If '-l' value is greater than output length, output is padded with nops\n"
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" If the last argument is '-' reads from stdin\n");
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printf ("Environment:\n"
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@ -379,7 +396,7 @@ int main (int argc, char *argv[]) {
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r_anal_set_bits (anal, sysbits);
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}
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while ((c = getopt (argc, argv, "Ai:k:DCc:eEva:b:s:do:Bl:hjLf:F:wO:")) != -1) {
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while ((c = getopt (argc, argv, "Ai:k:DCc:eEva:b:s:do:Bl:hjLf:F:wqO:")) != -1) {
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switch (c) {
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case 'a':
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arch = optarg;
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@ -423,7 +440,12 @@ int main (int argc, char *argv[]) {
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case 'i':
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skip = r_num_math (NULL, optarg);
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break;
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case 'j': json = true; break;
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case 'j':
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json = true;
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break;
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case 'q':
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quiet = true;
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break;
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case 'k':
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kernel = optarg;
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break;
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@ -447,7 +469,11 @@ int main (int argc, char *argv[]) {
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else r_asm_set_syntax (a, R_ASM_SYNTAX_INTEL);
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break;
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case 'v':
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ret = blob_version ("rasm2");
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if (quiet) {
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printf ("%s\n", R2_VERSION);
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} else {
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ret = blob_version ("rasm2");
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}
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goto beach;
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case 'w':
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whatsop = true;
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@ -22,13 +22,16 @@ static const char *has_esil(RCore *core, const char *name) {
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}
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// copypasta from binr/rasm2/rasm2.c
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static void rasm2_list(RCore *core, const char *arch) {
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static void rasm2_list(RCore *core, const char *arch, int fmt) {
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int i;
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const char *feat2, *feat;
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RAsm *a = core->assembler;
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char bits[32];
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RAsmPlugin *h;
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RListIter *iter;
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if (fmt == 'j') {
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r_cons_printf ("{");
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}
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r_list_foreach (a->plugins, iter, h) {
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if (arch && *arch) {
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if (h->cpus && !strcmp (arch, h->name)) {
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@ -54,11 +57,23 @@ static void rasm2_list(RCore *core, const char *arch) {
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if (h->assemble && !h->disassemble) feat = "a_";
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if (!h->assemble && h->disassemble) feat = "_d";
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feat2 = has_esil (core, h->name);
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r_cons_printf ("%s%s %-9s %-11s %-7s %s\n",
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feat, feat2, bits, h->name,
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h->license?h->license:"unknown", h->desc);
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if (fmt == 'q') {
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r_cons_printf ("%s\n", h->name);
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} else if (fmt == 'j') {
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const char *str_bits = "32, 64";
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const char *license = "GPL";
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r_cons_printf ("\"%s\":{\"bits\":[%s],\"license\":\"%s\",\"description\":\"%s\",\"features\":\"%s\"}%s",
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h->name, str_bits, license, h->desc, feat, iter->n? ",": "");
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} else {
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r_cons_printf ("%s%s %-9s %-11s %-7s %s\n",
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feat, feat2, bits, h->name,
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h->license?h->license:"unknown", h->desc);
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}
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}
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}
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if (fmt == 'j') {
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r_cons_printf ("}\n");
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}
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}
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static inline void __setsegoff(RConfig *cfg, const char *asmarch, int asmbits) {
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@ -166,21 +181,24 @@ static int cb_asmarch(void *user, void *data) {
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bits = core->anal->bits;
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}
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if (*node->value=='?') {
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rasm2_list (core, NULL);
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if (*node->value == '?') {
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rasm2_list (core, NULL, node->value[1]);
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return false;
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}
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r_egg_setup (core->egg, node->value, bits, 0, R_SYS_OS);
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if (*node->value) {
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if (!r_asm_use (core->assembler, node->value)) {
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eprintf ("asm.arch: cannot find (%s)\n", node->value);
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return false;
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}
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} else return false;
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if (!*node->value) {
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return false;
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}
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if (!r_asm_use (core->assembler, node->value)) {
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eprintf ("asm.arch: cannot find (%s)\n", node->value);
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return false;
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}
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if (core->assembler && core->assembler->cur) {
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bits = core->assembler->cur->bits;
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if (8&bits) bits = 8;
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if (8 & bits) bits = 8;
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else if (16 & bits) bits = 16;
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else if (32 & bits) bits = 32;
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else bits = 64;
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@ -347,7 +365,7 @@ static int cb_asmcpu(void *user, void *data) {
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RCore *core = (RCore *) user;
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RConfigNode *node = (RConfigNode *) data;
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if (*node->value=='?') {
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rasm2_list (core, r_config_get (core->config, "asm.arch"));
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rasm2_list (core, r_config_get (core->config, "asm.arch"), node->value[1]);
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return 0;
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}
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r_asm_set_cpu (core->assembler, node->value);
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@ -5,7 +5,7 @@
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.Nd radare2 assembler and disassembler tool
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.Sh SYNOPSIS
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.Nm rasm2
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.Op Fl ABdDeEfCLvw
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.Op Fl ABdDeEfCLvwq
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.Op Fl a Ar arch
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.Op Fl b Ar bits
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.Op Fl c Ar cpu
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@ -60,6 +60,8 @@ output to file, for example 'rasm2 \-BF a a.asm'
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Select syntax output (intel, att)
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.It Fl w
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Describe opcode (whats op)
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.It Fl q
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Quiet output (handy for -L, -v, ...)
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.El
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.Sh different than filename
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.Pp
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