dnrops
/
radare2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Enable linting for trailing tabs ##lint

This commit is contained in:
pancake 2022-08-22 23:25:40 +02:00
parent db747e1782
commit b6e7292019
134 changed files with 708 additions and 747 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
binr/r2r/run.c
View File

@ -303,7 +303,7 @@ R_API bool r2r_subprocess_wait(R2RSubprocess *proc, ut64 timeout_ms) {
proc_index = handles.len;
r_vector_push (&handles, &proc->proc);
}
DWORD timeout = INFINITE;
if (timeout_us_abs != UT64_MAX) {
ut64 now = r_time_now_mono ();

1
doc/kvast.md
View File

@ -89,7 +89,6 @@ This is an example
case '*':
case '/':
if (expect_arg) {
expect_arg = ch;
}
break;

4
libr/anal/arch/gb/gbasm.c
View File

@ -296,7 +296,7 @@ static int gbAsm(const char *buf, ut8 *outbuf) {
} else if (!strncmp (buf_asm, "[hl]", 4)) {
opbuf[0] = 0x35;
} else {
len = 0;
len = 0;
}
break;
}
@ -463,7 +463,7 @@ static int gbAsm(const char *buf, ut8 *outbuf) {
len = 0;
}
break;
case 0x706f70: //pop
case 0x706f70: //pop
if (strlen (buf_asm) < 6) {
free (buf_asm);
return 0;

2
libr/anal/arch/gb/gbdis.c
View File

@ -23,7 +23,7 @@ static int gbOpLength(int gboptype) {
}
}
static void gb_hardware_register_name(char *reg, ut8 offset) {
static void gb_hardware_register_name(char *reg, ut8 offset) {
switch (offset) {
case 0x00: // Joy pad info
r_str_cpy (reg, "rP1")

2
libr/anal/esil.c
View File

@ -608,7 +608,7 @@ R_API bool r_anal_esil_signext(RAnalEsil *esil, bool assign) {
return false;
}
free (p_dst);
// Make sure the other bits are 0
ut64 m = 0;
if (dst > 0 && dst < 64) {

10
libr/anal/fcn.c
View File

@ -1804,7 +1804,7 @@ R_API char *r_anal_function_get_json(RAnalFunction *function) {
} else {
realname = function->name;
}
char *args = strdup ("");
char *sdb_ret = r_str_newf ("func.%s.ret", realname);
char *sdb_args = r_str_newf ("func.%s.args", realname);
@ -2297,7 +2297,7 @@ static void update_analysis(RAnal *anal, RList *fcns, HtUP *reachable) {
fcn->ninstr -= bb->ninstr;
r_anal_function_remove_block (fcn, bb);
}
RList *bbs = r_list_clone (fcn->bbs);
r_anal_block_automerge (bbs);
r_anal_function_delete_unused_vars (fcn);
@ -2310,7 +2310,7 @@ static void calc_reachable_and_remove_block(RList *fcns, RAnalFunction *fcn, RAn
clear_bb_vars (fcn, bb, bb->addr, bb->addr + bb->size);
if (!r_list_contains (fcns, fcn)) {
r_list_append (fcns, fcn);
// Calculate reachable blocks from the start of function
HtUP *ht = ht_up_new0 ();
BlockRecurseCtx ctx = { fcn, ht };
@ -2335,12 +2335,12 @@ R_API void r_anal_update_analysis_range(RAnal *anal, ut64 addr, int size) {
HtUP *reachable = ht_up_new (NULL, free_ht_up, NULL);
const int align = r_anal_archinfo (anal, R_ANAL_ARCHINFO_ALIGN);
const ut64 end_write = addr + size;
r_list_foreach (blocks, it, bb) {
if (!r_anal_block_was_modified (bb)) {
continue;
}
r_list_foreach_safe (bb->fcns, it2, tmp, fcn) {
r_list_foreach_safe (bb->fcns, it2, tmp, fcn) {
if (align > 1) {
if ((end_write < r_anal_bb_opaddr_i (bb, bb->ninstr - 1))
&& (!bb->switch_op || end_write < bb->switch_op->addr)) {

2
libr/anal/p/anal_6502_cs.c
View File

@ -24,7 +24,7 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
static R_TH_LOCAL
#endif
cs_insn *insn = NULL;
csh handle = init_capstone (a);
if (handle == 0) {
return -1;

16
libr/anal/p/anal_arm_cs.c
View File

@ -1232,9 +1232,9 @@ static void arm64fpmath(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
COMMA (&op->esil);
VEC64_APPEND (&op->esil, 1, i);
if (convert) {
r_strbuf_appendf (&op->esil, ",F2D,F%s,D2F,", opchar);
r_strbuf_appendf (&op->esil, ",F2D,F%s,D2F,", opchar);
} else {
r_strbuf_appendf (&op->esil, ",F%s,", opchar);
r_strbuf_appendf (&op->esil, ",F%s,", opchar);
}
VEC64_DST_APPEND (&op->esil, 0, i);
r_strbuf_appendf (&op->esil, ",=");
@ -1355,7 +1355,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
case ARM64_INS_ORR:
OPCALL ("|");
break;
#if CS_API_MAJOR > 4
#if CS_API_MAJOR > 4
case ARM64_INS_NAND:
OPCALL_NEG ("&");
break;
@ -1475,7 +1475,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0),
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0),
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0)
);
);
} else {
r_strbuf_setf (&op->esil,
"%d,%s,F2D,NAN,vf,:="
@ -1850,7 +1850,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
}
r_strbuf_appendf (&op->esil, ",[%d],~,%s,=", size, REG64 (0));
if (ISPOSTINDEX64 ()) {
if (ISREG64 (2)) { // not sure if register valued post indexing exists?
r_strbuf_appendf (&op->esil, ",tmp,%s,+,%s,=", REG64 (2), REG64 (1));
@ -1894,7 +1894,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
ARG64_APPEND (&op->esil, 0);
r_strbuf_appendf (&op->esil, ",==,$z,zf,:=,%d,$s,nf,:=,%d,$b,!,cf,:=,%d,$o,vf,:=",
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) - 1);
if (insn->id == ARM64_INS_CCMP || insn->id == ARM64_INS_CCMN) {
r_strbuf_appendf (&op->esil, ",");
arm_prefix_cond (op, insn->detail->arm64.cc);
@ -1908,7 +1908,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
ARG64_APPEND (&op->esil, 0);
r_strbuf_appendf (&op->esil, ",-1,*,==,$z,zf,:=,%d,$s,nf,:=,%d,$b,!,cf,:=,%d,$o,vf,:=",
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) - 1);
if (insn->id == ARM64_INS_CCMN) {
r_strbuf_appendf (&op->esil, ",");
arm_prefix_cond (op, insn->detail->arm64.cc);
@ -1938,7 +1938,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
case ARM64_INS_STLXR:
case ARM64_INS_STLXRH:
case ARM64_INS_STLXRB:
{
{
int size = REGSIZE64 (1);
switch (insn->id) {
case ARM64_INS_STLXRB:

2
libr/anal/p/anal_arm_regprofile.inc
View File

@ -438,7 +438,7 @@ static char *get_reg_profile(RAnal *anal) {
"fpu q29h .64 760 0\n"
"fpu q30h .64 776 0\n"
"fpu q31h .64 792 0\n"
/* scalable vector registers */
// these can be more than 128 bit
// adding mostly to stop ESIL errors

30
libr/anal/p/anal_arm_v35.c
View File

@ -180,7 +180,7 @@ static int vas_count(ArrangementSpec vas) {
/* low 8-bit of v-reg considered as... */
case ARRSPEC_1BYTE: /* (.b) one 8-bit byte: REG_V0_B0 */
return 1;
default:
return 0;
}
@ -600,7 +600,7 @@ static void vector64_append(RStrBuf *sb, Instruction *insn, int n, int i) {
static void vector64_dst_append(RStrBuf *sb, Instruction *insn, int n, int i) {
InstructionOperand op = INSOP64 (n);
if (op.laneUsed) {
i = op.lane;
}
@ -750,9 +750,9 @@ static void arm64fpmath(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
COMMA (&op->esil);
VEC64_APPEND (&op->esil, 1, i);
if (convert) {
r_strbuf_appendf (&op->esil, ",F2D,F%s,D2F,", opchar);
r_strbuf_appendf (&op->esil, ",F2D,F%s,D2F,", opchar);
} else {
r_strbuf_appendf (&op->esil, ",F%s,", opchar);
r_strbuf_appendf (&op->esil, ",F%s,", opchar);
}
VEC64_DST_APPEND (&op->esil, 0, i);
r_strbuf_appendf (&op->esil, ",=");
@ -1398,7 +1398,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
case ARM64_ORNS:
OPCALL_NEG("|");
SET_FLAGS();
break;
break;
case ARM64_ORN:
OPCALL_NEG("|");
break;
@ -1480,7 +1480,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0),
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0),
REGBITS64 (1), REG64 (1), REGBITS64 (1), REG64 (0)
);
);
} else {
r_strbuf_setf (&op->esil,
"%d,%s,F2D,NAN,vf,:="
@ -1838,7 +1838,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
r_strbuf_appendf (&op->esil, "%"PFMT64u",%s,+",
MEMDISP64 (1), MEMBASE64 (1));
}
if (ISPREINDEX32 () || ISPOSTINDEX32 ()) {
r_strbuf_appendf (&op->esil, ",DUP,tmp,=");
@ -1867,14 +1867,14 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
r_strbuf_setf (&op->esil, "%s,[%d],%s,=",
REG64 (1), size, REG64 (0));
} else if (OPCOUNT64 () == 3) {
/*This seems like a capstone bug:
instructions like
ldr x16, [x13, x9]
ldrb w2, [x19, x23]
are not detected as ARM64_OP_MEM type and
fall in this case instead.*/
if (ISREG64 (2)) {
r_strbuf_setf (&op->esil, "%s,%s,+,[%d],%s,=",
REG64 (1), REG64 (2), size, REG64 (0));
@ -1941,7 +1941,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
}
r_strbuf_appendf (&op->esil, ",[%d],~,%s,=", size, REG64 (0));
if (ISPOSTINDEX32()) {
if (ISREG64 (2)) { // not sure if register valued post indexing exists?
r_strbuf_appendf (&op->esil, ",tmp,%s,+,%s,=", REG64 (2), REG64 (1));
@ -1957,14 +1957,14 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
r_strbuf_setf (&op->esil, "%d,%s,[%d],~,%s,=",
size*8, REG64 (1), size, REG64 (0));
} else if (OPCOUNT64 () == 3) {
/*This seems like a capstone bug:
instructions like
ldr x16, [x13, x9]
ldrb w2, [x19, x23]
are not detected as ARM64_OP_MEM type and
fall in this case instead.*/
if (ISREG64 (2)) {
r_strbuf_setf (&op->esil, "%d,%s,%s,+,[%d],~,%s,=",
size*8, REG64 (1), REG64 (2), size, REG64 (0));
@ -1985,7 +1985,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
ARG64_APPEND(&op->esil, 0);
r_strbuf_appendf (&op->esil, ",==,$z,zf,:=,%d,$s,nf,:=,%d,$b,!,cf,:=,%d,$o,vf,:=",
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) -1);
if (insn->operation == ARM64_CCMP || insn->operation == ARM64_CCMN) {
r_strbuf_appendf (&op->esil, ",");
v35arm_prefix_cond(op, insn->operands[3].cond);
@ -1999,7 +1999,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
ARG64_APPEND(&op->esil, 0);
r_strbuf_appendf (&op->esil, ",-1,*,==,$z,zf,:=,%d,$s,nf,:=,%d,$b,!,cf,:=,%d,$o,vf,:=",
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) -1);
if (insn->operation == ARM64_CCMN) {
r_strbuf_appendf (&op->esil, ",");
v35arm_prefix_cond(op, insn->operands[3].cond);
@ -2168,7 +2168,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
ldrb w2, [x19, x23]
are not detected as ARM64_OP_MEM type and
fall in this case instead.*/
if (ISREG64 (2)) {
r_strbuf_setf (&op->esil, "%s,%s,%s,+,=[%d]",
REG64 (0), REG64 (1), REG64 (2), size);

6
libr/anal/p/anal_bpf_cs.c
View File

@ -28,10 +28,8 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
if (handle == 0) {
return -1;
}
op->size = 8;
op->addr = addr;
cs_insn *insn = NULL;
int n = cs_disasm (handle, (ut8*)buf, len, addr, 1, &insn);
if (n < 1) {
@ -483,10 +481,10 @@ void analop_esil(RAnal *a, RAnalOp *op, cs_insn *insn, ut64 addr) {
"8,0xff,16,%s,>>,&,<<,tmp,|=,"
"0xff,24,%s,>>,&,tmp,|=,tmp,%s,=",
r0, r0, r0, r0, r0, r0);
break;
}
case BPF_INS_BE64:
case BPF_INS_BE64:
{
const char *r0 = REG (0);
esilprintf (op,

2
libr/anal/p/anal_dalvik.c
View File

@ -880,7 +880,7 @@ static int dalvik_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int l
}
break;
case 0x0a: // move-result
case 0x0b: // move-result-wide
case 0x0b: // move-result-wide
case 0x0c: // move-result-object
case 0x0d: // move-exception
// TODO: add MOVRET OP TYPE ??

2
libr/anal/p/anal_evm_cs.c
View File

@ -37,7 +37,7 @@ static int analop(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
if (hndl == 0) {
return -1;
}
int n, opsize = -1;
cs_insn* insn;
char *str;

4
libr/anal/p/anal_loongarch_gnu.c
View File

@ -1225,7 +1225,7 @@ static int loongarch_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int l
}
ase->opc_htab_inited = 1;
}
it = ase->la_opcode_ht[LA_INSN_HASH(opcode)];
/* it = ase->opcode; */
for (; it->match; it++) {
@ -1238,7 +1238,7 @@ static int loongarch_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int l
}
}
op->id = insn_id;
switch (insn_id) {
case LA_INS_BEQ:
case LA_INS_BNE:

2
libr/anal/p/anal_m680x_cs.c
View File

@ -67,7 +67,7 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
if (handle == 0) {
return -1;
}
int n, opsize = -1;
cs_insn* insn;

4
libr/anal/p/anal_m68k_cs.c
View File

@ -253,12 +253,12 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
if (handle == 0) {
return -1;
}
int n, opsize = -1;
cs_insn* insn = NULL;
cs_m68k *m68k;
cs_detail *detail;
op->size = 4;
n = cs_disasm (handle, (ut8*)buf, len, addr, 1, &insn);
int on = n;

18
libr/anal/p/anal_mips_gnu.c
View File

@ -1075,7 +1075,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, gnu_insn*insn) {
default:
return -1;
}
return 0;
}
@ -1092,7 +1092,7 @@ static int disassemble(RAnal *a, RAnalOp *op, const ut8 *buf, int len) {
if ((cpu != pre_cpu) && (a->config->features != pre_features)) {
free (disasm_obj.disassembler_options);
memset (&disasm_obj, '\0', sizeof (struct disassemble_info));
}
}
/* prepare disassembler */
if (cpu && (!pre_cpu || !strcmp (cpu, pre_cpu))) {
@ -1175,7 +1175,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
op->addr = addr;
disassemble (anal, op, b, len);
}
op->type = R_ANAL_OP_TYPE_UNK;
op->size = oplen;
op->addr = addr;
@ -1187,7 +1187,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
op->type = R_ANAL_OP_TYPE_NOP;
return oplen;
}
opcode = r_swap_ut32(opcode);
buf = (ut8 *) & opcode;
@ -1218,7 +1218,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
int rd = buf[2]>>3;
int sa = ((buf[2]&7)<<2)+(buf[3]>>6);
int fun = buf[3]&63;
insn.r_reg.rs = mips_reg_decode (rs);
insn.r_reg.rd = mips_reg_decode (rd);
insn.r_reg.rt = mips_reg_decode (rt);
@ -1500,7 +1500,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
insn.id = MIPS_INS_BAL;
} else {
op->fail = addr+8;
insn.id = MIPS_INS_BGEZAL;
insn.id = MIPS_INS_BGEZAL;
}
op->delay = 1;
op->type = R_ANAL_OP_TYPE_CALL;
@ -1509,7 +1509,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
op->delay = 1;
op->fail = addr+8;
break;
}
}
break;
case 4: // beq
if (!insn.id) {
@ -1538,7 +1538,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
op->jump = addr + (imm << 2) + 4;
op->fail = addr + 8;
op->delay = 1;
snprintf ((char *)insn.i_reg.jump, REG_BUF_MAX, "0x%"PFMT64x, op->jump);
break;
// The following idiom is very common in mips 32 bit:
@ -1634,7 +1634,7 @@ static int mips_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, R
op->refptr = 8;
insn.id = MIPS_INS_LD;
}
if (rs == 28) {
op->ptr = anal->gp + imm;
} else {

2
libr/anal/p/anal_riscv_cs.c
View File

@ -328,7 +328,7 @@ static int analop(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
if (hndl == 0) {
return -1;
}
int n, opsize = -1;
cs_insn* insn;
if (!op) {

2
libr/anal/p/anal_s390_cs.c
View File

@ -63,7 +63,7 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
if (handle == 0) {
return -1;
}
cs_insn *insn = NULL;
op->addr = addr;
op->size = 2;

10
libr/anal/p/anal_x86_cs.c
View File

@ -837,7 +837,7 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
} else {
esilprintf (op, "%s,%s,=", src, dst);
}
}
}
}
break;
}
@ -999,7 +999,7 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
"%s,%d,-,%s,<<,%s,%s,>>,|,1,%d,1,<<,-,&,%s,$z,zf,:=,$p,pf,:=,%d,$s,sf,:=,}",
shft, shft, dst_r, shft, src, bitsize-1, dst_r,
shft, bitsize, src, shft, dst_r, bitsize, dst_w, bitsize-1);
}
break;
case X86_INS_PSLLDQ:
@ -2142,11 +2142,11 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
case X86_INS_CVTSS2SI:
case X86_INS_CVTPS2PI:
esilprintf (op, "32,%s,F2D,D2I,%s", src, dst);
break;
break;
case X86_INS_CVTSD2SI:
case X86_INS_CVTPD2PI:
esilprintf (op, "%s,D2I,%s", src, dst);
break;
break;
case X86_INS_CVTSD2SS:
case X86_INS_CVTPD2PS:
esilprintf (op, "32,%s,D2F,%s", src, dst);
@ -3597,7 +3597,7 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
return -1;
}
int mode = cs_omode;
cs_insn *insn = NULL;
int n;

2
libr/anal/p/anal_xcore_cs.c
View File

@ -64,7 +64,7 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAn
if (handle == 0) {
return -1;
}
cs_insn *insn;
int n;
// capstone-next

7
libr/anal/var.c
View File

@ -1595,8 +1595,8 @@ R_API void r_anal_var_list_show(RAnal *anal, RAnalFunction *fcn, int kind, int m
pj_ks (pj, "name", var->name);
if (var->isarg) {
pj_ks (pj, "kind", "arg");
} else {
pj_ks (pj, "kind", "var");
} else {
pj_ks (pj, "kind", "var");
}
pj_ks (pj, "type", var->type);
pj_k (pj, "ref");
@ -1783,7 +1783,6 @@ R_API char *r_anal_function_format_sig(R_NONNULL RAnal *anal, R_NONNULL RAnalFun
comma = ", ";
}
}
r_list_foreach (cache->bvars, iter, var) {
if (var->isarg) {
tmp_len = strlen (var->type);
@ -1795,7 +1794,6 @@ R_API char *r_anal_function_format_sig(R_NONNULL RAnal *anal, R_NONNULL RAnalFun
}
}
}
r_list_foreach (cache->svars, iter, var) {
if (var->isarg) {
tmp_len = strlen (var->type);
@ -1807,7 +1805,6 @@ R_API char *r_anal_function_format_sig(R_NONNULL RAnal *anal, R_NONNULL RAnalFun
}
}
}
beach:
r_strbuf_append (buf, ");");
R_FREE (type_fcn_name);

180
libr/asm/arch/arm/armass.c
View File

@ -204,7 +204,7 @@ static char *parse_hints(char *input) {
static st8 iflag(char *input) {
st8 res = 0;
r_str_case (input, false);
for (; *input; input++) {
switch (*input) {
case 'a':
@ -227,7 +227,7 @@ static ut64 cqcheck(char **input) {
ut64 res = 0;
int i;
ut8 offset = 0;
const char *conds[] = {
"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
"hi", "ls", "ge", "lt", "gt", "le", "al", "nv", 0
@ -250,7 +250,7 @@ static ut64 cqcheck(char **input) {
*input += 2;
offset += 2;
}
if (**input == '\0') {
return res;
}
@ -260,7 +260,7 @@ static ut64 cqcheck(char **input) {
static ut64 opmask(char *input, const char *opcode, ut64 allowed_mask) {
ut64 res = 0;
r_str_case (input, false);
if (strlen (opcode) > strlen (input)) {
return 0;
@ -269,7 +269,7 @@ static ut64 opmask(char *input, const char *opcode, ut64 allowed_mask) {
input += strlen (opcode);
res |= M_BIT;
res |= cqcheck (&input);
if ((*input == 's') && (S_BIT & allowed_mask)) {
res |= S_BIT;
input++;
@ -466,7 +466,7 @@ static ut64 getnumbang(const char *str) {
free (temp);
return res; // err propagates
}
static ut32 getimmed8(const char *str) {
ut32 num = getnum (str);
if (err) {
@ -711,7 +711,7 @@ static st32 getregmemstart(const char *input) {
input++;
return getreg (input);
}
static st32 getregmemstartend(const char *input) {
st32 res;
if (!input || (strlen (input) < 2) || (*input != '[') || !r_str_endswith (input, "]")) {
@ -726,7 +726,7 @@ static st32 getregmemstartend(const char *input) {
free (temp);
return res;
}
static st32 getregmemend(const char *input) {
st32 res;
if (!input || !*input || !r_str_endswith (input, "]")) {
@ -741,10 +741,10 @@ static st32 getregmemend(const char *input) {
free (temp);
return res;
}
static st32 getreglist(const char *input) {
st32 res;
if (!input || (strlen (input) < 2) || (*input != '{') || !r_str_endswith (input, "}")) {
return -1;
}
@ -827,7 +827,7 @@ static int getcoproc(const char *str) {
static int getcoprocreg(const char *str) {
char *ep;
if (!str || !*str) {
return -1;
}
@ -851,8 +851,8 @@ static ut8 interpret_msrbank(char *str, ut8 *spsr) {
*spsr = 1;
} else {
*spsr = 0;
}
}
if (r_str_startswith (str, "apsr_")) {
if (!(strcmp (str+5, "g"))) {
return 0x4;
@ -880,7 +880,7 @@ static ut8 interpret_msrbank(char *str, ut8 *spsr) {
}
return 0;
}
static ut32 thumb_getshift(const char *str) {
// only immediate shifts are ever used by thumb-2. Bit positions are different from ARM.
const char *shifts[] = {
@ -894,16 +894,16 @@ static ut32 thumb_getshift(const char *str) {
err = false;
ut32 argn;
ut32 i;
r_str_case (type,true);
if (!strcmp (type, shifts[5])) {
// handle RRX alias case
res |= 3 << 12;
res |= 3 << 12;
free (type);
return res;
}
space = strchr (type, ' ');
if (!space) {
free (type);
@ -912,7 +912,7 @@ static ut32 thumb_getshift(const char *str) {
}
*space = 0;
arg = strdup (++space);
for (i = 0; shifts[i]; i++) {
if (!strcmp (type, shifts[i])) {
shift = true;
@ -926,7 +926,7 @@ static ut32 thumb_getshift(const char *str) {
return 0;
}
res |= i << 12;
argn = getnum (arg);
if (err || argn > 32) {
err = true;
@ -1031,7 +1031,7 @@ static ut64 thumb_selector(ArmOpcode *ao) {
res |= 2ULL << (i * 4);
continue;
}
err = false;
err = false;
thumb_getshift (args[i]);
if (!err) {
res |= 3ULL << (i * 4);
@ -1092,7 +1092,7 @@ static ut64 thumb_selector(ArmOpcode *ao) {
err = false;
return res;
}
static ut32 getshift(const char *str) {
char type[128];
char arg[128];
@ -1321,7 +1321,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15)) {
return -1;
}
if (reg2 == 13) {
if ((reg1 < 8) && (num < 1024) && (num % 4 == 0) && (!(m & DOTW_BIT)) && (!(m & W_BIT))) {
ao->o = 0x00a8;
@ -1414,7 +1414,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15)) {
return -1;
}
if (reg2 == 13) {
if ((reg1 == reg3) && (!(m & DOTW_BIT)) && (shift == 0)) {
ao->o = 0x6844;
@ -1895,8 +1895,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
default:
return -1;
}
} else
if (( m = opmask (ao->op, "clrex", 0) )) {
} else if (( m = opmask (ao->op, "clrex", 0) )) {
ut64 argt = thumb_selector (ao);
switch (argt) {
case THUMB_NONE: {
@ -2187,7 +2186,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_OTHER: {
ut16 cond = 0;
ut16 i;
const char *conds[] = {
"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
"hi", "ls", "ge", "lt", "gt", "le", "al", "nv", 0
@ -2239,7 +2238,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
imm = -imm;
} else {
ao->o |= 1 << 31;
}
}
if ((proc > 15) || (reg1 > 15) || (reg2 > 15) || (imm > 1024) || (imm % 4 != 0)) {
return -1;
}
@ -2269,7 +2268,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
imm = -imm;
} else {
ao->o |= 1 << 31;
}
}
if ((proc > 15) || (reg1 > 15) || (reg2 > 15) || (imm > 1024) || (imm % 4 != 0)) {
return -1;
}
@ -2296,7 +2295,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
imm = -imm;
} else {
ao->o |= 1 << 31;
}
}
if ((proc > 15) || (reg1 > 15) || (reg2 > 15) || (imm > 1024) || (imm % 4 != 0)) {
return -1;
}
@ -2323,7 +2322,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
list ^= 1 << (reg1);
}
ao->o |= (list & 0xff) << 8;
return 2;
}
if (list & 0x2000) {
@ -2335,7 +2334,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// ldmia is the default!
ao->o = 0xb0e80000;
}
ao->o |= reg1 << 24;
ao->o |= (list & 0xff) << 8;
ao->o |= (list & 0xff00) >> 8;
@ -2355,13 +2354,13 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if (list & 0x2000) {
return -1;
}
if ((m & DB_BIT) || (m & EA_BIT)) {
ao->o = 0x10e90000;
} else {
ao->o = 0x90e80000;
}
ao->o |= reg1 << 24;
ao->o |= (list & 0xff) << 8;
ao->o |= (list & 0xff00) >> 8;
@ -2563,7 +2562,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
return mem_32bit_2reg (ao, m);
} else {
return -1;
}
}
}
break;
case THUMB_REG_BRACKREGBRACK_CONST: {
@ -2757,7 +2756,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_REG_BRACKREGBRACK: {
ut8 reg1 = getreg (ao->a[0]);
ut8 reg2 = getregmemstartend (ao->a[1]);
if (ldrsel == B_BIT) {
ao->o = 0xd0e84f0f;
ao->o |= reg1 << 4;
@ -2813,7 +2812,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if (num > 32) {
return -1;
}
ao->o = 0x0000;
ao->o = 0x0000;
if (std_16bit_2reg (ao, m)) {
ao->o |= (num & 0x03) << 14;
ao->o |= num >> 2;
@ -2846,8 +2845,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
default:
return -1;
}
} else
if ((m = opmask (ao->op, "lsr", S_BIT))) {
} else if ((m = opmask (ao->op, "lsr", S_BIT))) {
ut64 argt = thumb_selector (ao);
switch (argt) {
case THUMB_REG_REG_CONST: {
@ -2993,7 +2991,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if (reg1 > 15) {
return -1;
}
if ((m & W_BIT) || (m & T_BIT)) {
ut32 wnum = getnum (ao->a[1]);
if (wnum > 65535) {
@ -3007,18 +3005,18 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o |= getthzeroimmed16 (wnum);
return 4;
}
if (err) {
return -1;
}
if ((num < 256) && (reg1 < 8) && (!(m & DOTW_BIT))) {
ao->o = 0x0020;
ao->o |= reg1;
ao->o |= num << 8;
return 2;
}
ao->o = 0x4ff00000;
ao->o |= reg1;
ao->o |= getthimmed12 (ao->a[1]);
@ -3031,7 +3029,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_REG_REG: {
ut32 reg1 = getreg (ao->a[0]);
ut32 reg2 = getreg (ao->a[1]);
if ((reg1 > 15) || (reg2 > 15)) {
return -1;
}
@ -3043,14 +3041,14 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o |= reg2 << 11;
return 2;
}
if ((reg1 < 8) && (reg2 < 8) && (!(m & DOTW_BIT))) {
ao->o = 0;
ao->o |= reg1 << 8;
ao->o |= reg2 << 11;
return 2;
}
ao->o = 0x4fea0000;
ao->o |= reg1;
ao->o |= reg2 << 8;
@ -3149,7 +3147,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o |= reg1;
return 4;
}
return -1;
}
break;
@ -3168,7 +3166,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((bank == 0) || (reg1 > 15)) {
return -1;
}
ao->o = 0x80f30080;
ao->o |= reg1 << 24;
ao->o |= bank;
@ -3211,7 +3209,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg1 = getreg (ao->a[0]);
err = false;
ut32 num = getthimmed12 (ao->a[1]);
if ((reg1 > 15) || err) {
return -1;
}
@ -3237,7 +3235,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15)) {
return -1;
}
ao->o = 0xc043;
if ((shift == 0) && (std_16bit_2reg (ao, m))) {
return 2;
@ -3385,7 +3383,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_REG_REG_REG_SHIFT: {
ut32 shift = thumb_getshift (ao->a[3]);
if (((m & TB_BIT) && ((shift & 0x00003000) != 0x00002000)) || ((m & BT_BIT) && ((shift & 0x00003000) != 0)) || ((m & (TB_BIT | BT_BIT)) == 0)) {
if (((m & TB_BIT) && ((shift & 0x00003000) != 0x00002000)) || ((m & BT_BIT) && ((shift & 0x00003000) != 0)) || ((m & (TB_BIT | BT_BIT)) == 0)) {
return -1;
}
@ -3729,7 +3727,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if (reg1 > 15) {
return -1;
}
if ((m & DB_BIT) || (m & EA_BIT)) {
ao->o = 0x10e800c0;
} else {
@ -3789,11 +3787,11 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_REG_REG: {
ut8 reg1 = getreg (ao->a[0]);
ut8 reg2 = getreg (ao->a[1]);
if ((reg1 > 15) || (reg2 > 15)) {
return -1;
}
ao->o = 0x4fea3000;
ao->o |= reg1;
ao->o |= reg2 << 8;
@ -3928,7 +3926,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
return -1;
}
ao->o |= num;
return std_32bit_2reg (ao, m, false);
}
break;
@ -4097,7 +4095,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
case THUMB_CONST: {
err = false;
ut32 num = getnum (ao->a[0]);
if (err || (num > 15)) {
return -1;
}
@ -4118,7 +4116,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg2 = getreg (ao->a[1]);
ut8 reg3 = getreg (ao->a[2]);
ut8 reg4 = getreg (ao->a[3]);
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15) || (reg4 > 15) || (m & DOTN_BIT)) {
return -1;
}
@ -4396,7 +4394,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o = 0x0de800c0;
} else {
ao->o = 0x8de900c0;
}
}
ao->o |= num << 8;
ao->o |= w << 29;
return 4;
@ -4496,7 +4494,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((coproc > 15) || (coreg > 15) || (reg > 15) || (num > 4092) || (num < -4092) || (num % 4 != 0)) {
return -1;
}
ao->o = 0x00ed0000;
if (m & L_BIT) {
ao->o |= 1 << 30;
@ -4508,7 +4506,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
num = -num;
} else {
ao->o |= 1 << 31;
}
}
ao->o |= coproc;
ao->o |= coreg << 4;
ao->o |= reg << 24;
@ -4525,7 +4523,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((coproc > 15) || (coreg > 15) || (reg > 15) || (num > 4092) || (num < -4092) || (num % 4 != 0)) {
return -1;
}
ao->o = 0x20ec0000;
if (m & L_BIT) {
ao->o |= 1 << 30;
@ -4554,7 +4552,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((coproc > 15) || (coreg > 15) || (reg > 15) || (num > 4092) || (num < -4092) || (num % 4 != 0)) {
return -1;
}
ao->o = 0x20ed0000;
if (m & L_BIT) {
ao->o |= 1 << 30;
@ -4603,7 +4601,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((m & (FD_BIT | DB_BIT | IA_BIT | EA_BIT)) == 0) {
return -1;
}
if (m & (FD_BIT | DB_BIT)) {
ao->o = 0x00e90000;
} else {
@ -4653,7 +4651,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o |= num << 8;
return mem_32bit_2reg (ao, m);
}
if ((strsel == 0) && (reg2 == 13) && (num >= 0) && (num < 1024) && ((num % 4) == 0) && (reg1 < 8) & (!(m & DOTW_BIT))) {
ao->o = 0x0090;
ao->o |= reg1;
@ -4685,7 +4683,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
return 2;
}
}
if ((num > 4095) || (num < -255)) {
return -1;
}
@ -4801,7 +4799,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg2 = getregmemstart (ao->a[1]);
ut8 reg3 = getreg (ao->a[2]);
ut32 shift = getshiftmemend (ao->a[3]) >> 2;
if (((shift & 0xffffcfff) != 0) || (reg1 > 15) || (reg2 > 15) || (reg3 > 15)) {
return -1;
}
@ -4815,7 +4813,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
ao->o |= reg1 << 4;
ao->o |= reg2 << 24;
ao->o |= reg3 << 8;
@ -4911,7 +4909,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg1 = getreg (ao->a[0]);
ut8 reg2 = getreg (ao->a[1]);
ut8 reg3 = getregmemstartend (ao->a[2]);
if ((strsel == D_BIT) || (reg1 > 15) || (reg2 > 15) || (reg3 > 15)) {
return -1;
}
@ -4999,7 +4997,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
}
err = false;
ut32 thnum = getthimmed12 (ao->a[2]);
if (!err && (!(m & W_BIT))) {
ao->o = 0xadf10000;
ao->o |= thnum;
@ -5038,7 +5036,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
err = false;
ut32 thnum = getthimmed12 (ao->a[2]);
if (!err && (!(m & W_BIT))) {
ao->o = 0xa0f10000;
ao->o |= thnum;
@ -5094,7 +5092,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ao->o |= (reg3 >> 2);
return 2;
}
ao->o = 0xa0eb0000;
return std_32bit_3reg (ao, m, true);
}
@ -5143,7 +5141,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
}
ut64 sufsel = m & (B_BIT | H_BIT | SIXTEEN_BIT);
if (sufsel == B_BIT) {
ao->o = 0x40fa80f0;
} else if (sufsel == (B_BIT | SIXTEEN_BIT)) {
@ -5227,7 +5225,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg1 = getregmemstart (ao->a[0]);
ut8 reg2 = getreg (ao->a[1]);
ut32 shift = getshiftmemend (ao->a[2]);
if ((reg1 > 15) || (reg2 > 15) || (shift != 0x00004000) || (sufsel != H_BIT)) {
return -1;
}
@ -5291,7 +5289,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
break;
case THUMB_REG_REG: {
ao->o = 0x0042;
if (std_16bit_2reg (ao, m)) {
return 2;
}
@ -5352,7 +5350,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
ut8 reg2 = getreg (ao->a[1]);
ut32 lsb = getnum (ao->a[2]);
ut32 widthm1 = getnum (ao->a[3]) - 1;
if ((reg1 > 15) || (reg2 > 15) || (lsb > 31) || ((31 - lsb) <= widthm1)) {
return -1;
}
@ -5400,7 +5398,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
return std_32bit_3reg (ao, m, false);
}
break;
@ -5416,9 +5414,9 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0xa0fa60f0;
return std_32bit_3reg (ao, m, false);
}
break;
default:
@ -5433,7 +5431,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0xe0fa60f0;
return std_32bit_3reg (ao, m, false);
}
break;
@ -5456,7 +5454,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
return std_32bit_3reg (ao, m, false);
}
break;
@ -5475,7 +5473,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15) || (reg4 > 15)) {
return -1;
}
ao->o = 0xe0fb6000;
ao->o |= reg1 << 4;
ao->o |= reg2;
@ -5499,7 +5497,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15) || (reg4 > 15)) {
return -1;
}
ao->o = 0xe0fb0000;
ao->o |= reg1 << 4;
ao->o |= reg2;
@ -5523,7 +5521,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15) || (reg4 > 15)) {
return -1;
}
ao->o = 0xa0fb0000;
ao->o |= reg1 << 4;
ao->o |= reg2;
@ -5551,7 +5549,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
return std_32bit_3reg (ao, m, false);
}
break;
@ -5567,7 +5565,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0xa0fa50f0;
return std_32bit_3reg (ao, m, false);
}
break;
@ -5583,7 +5581,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0xe0fa50f0;
return std_32bit_3reg (ao, m, false);
}
break;
@ -5606,7 +5604,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
return std_32bit_3reg (ao, m, false);
}
break;
@ -5622,7 +5620,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0x70fb00f0;
return std_32bit_3reg (ao, m, false);
}
break;
@ -5641,7 +5639,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
if ((reg1 > 15) || (reg2 > 15) || (reg3 > 15) || (reg4 > 15)) {
return -1;
}
ao->o = 0x70fb0000;
ao->o |= reg1;
ao->o |= reg2 << 24;
@ -5708,7 +5706,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
// intentional fallthrough
case THUMB_REG_REG_REG: {
ao->o = 0xe0fa40f0;
return std_32bit_3reg (ao, m, false);
}
break;
@ -5731,7 +5729,7 @@ static int thumb_assemble(ArmOpcode *ao, ut64 off, const char *str) {
} else {
return -1;
}
return std_32bit_3reg (ao, m, false);
}
break;

12
libr/asm/arch/arm/armass64.c
View File

@ -514,7 +514,7 @@ static ut32 ror(ArmOp *op) {
static ut32 ngc(ArmOp *op) {
ut32 data = UT32_MAX;
int k = 0;
check_cond(op->operands[0].type == ARM_GPR);
check_cond(op->operands[1].type == ARM_GPR);
@ -1851,9 +1851,9 @@ bool arm64ass(const char *str, ut64 addr, ut32 *op) {
} else if (!strncmp (str, "lsl ", 4)) {
*op = r_n_math (&ops, 0x0020c09a, 0x0020c01a, has64reg (str));
} else if (!strncmp (str, "lsr ", 4)) {
*op = r_n_math (&ops, 0x0024c09a, 0x0024c01a, has64reg (str));
*op = r_n_math (&ops, 0x0024c09a, 0x0024c01a, has64reg (str));
} else if (!strncmp (str, "adc ", 4)) {
*op = r_n_math (&ops, 0x0000009a, 0x0000001a, has64reg (str));
*op = r_n_math (&ops, 0x0000009a, 0x0000001a, has64reg (str));
} else if (!strncmp (str, "adcs", 4)) {
*op = r_n_math (&ops, 0x000000ba, 0x0000003a, has64reg (str));
} else if (!strncmp (str, "sbc ", 4)) {
@ -1863,13 +1863,13 @@ bool arm64ass(const char *str, ut64 addr, ut32 *op) {
} else if (!strncmp (str, "ror ", 4)) {
*op = ror (&ops);
} else if (!strncmp (str, "adds", 4)) {
*op = adds (&ops);
*op = adds (&ops);
} else if (!strncmp (str, "ngc ", 4)) {
*op = ngc (&ops);
} else if (!strncmp (str, "rev", 3)) {
*op = rev (&ops);
*op = rev (&ops);
} else if (!strncmp (str, "mvn", 3)) {
*op = mvn (&ops);
*op = mvn (&ops);
} else if (!strncmp (str, "rbit", 4)) {
*op = rbit (&ops);
} else if (!strncmp (str, "tst", 3)) {

2
libr/asm/arch/arm/winedbg/be_arm.c
View File

@ -192,7 +192,7 @@ static ut32 arm_disasm_dataprocessing(struct winedbg_arm_insn *arminsn, ut32 ins
if (!no_dst) {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, " %s, ", tbl_regs[get_nibble (inst, 3)]);
} else {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, " ");
arminsn->str_asm = r_str_appendf (arminsn->str_asm, " ");
}
if (no_op1) {
if (immediate) {

12
libr/asm/arch/avr/avr_disasm.c
View File

@ -46,7 +46,7 @@ static uint16_t extractDataFromMask(uint16_t data, uint16_t mask);
static int lookupInstruction(uint16_t opcode, int offset) {
uint16_t opcodeSearch, operandTemp;
int insidx, ghostRegisterConfirmed, i, j;
for (insidx = offset; insidx < AVR_TOTAL_INSTRUCTIONS; insidx++) {
opcodeSearch = opcode;
/* If we have a ghost register operand (OPERAND_REGISTER_GHOST),
@ -128,7 +128,7 @@ int disassembleInstruction(avrDisassembleContext *context, disassembledInstructi
dInstruction->address = aInstruction.address;
dInstruction->instruction = &instructionSet[insidx];
dInstruction->alternateInstruction = NULL;
/* Copy out each operand, extracting the operand data from the original
* opcode using the operand mask. */
for (i = 0; i < instructionSet[insidx].numOperands; i++) {
@ -142,7 +142,7 @@ int disassembleInstruction(avrDisassembleContext *context, disassembledInstructi
context->longInstruction = *dInstruction;
}
}
/* Disassemble operands */
if (disassembleOperands(dInstruction) < 0) {
return ERROR_INVALID_ARGUMENTS; /* Only possible error for disassembleOperands() */
@ -162,7 +162,7 @@ int disassembleInstruction(avrDisassembleContext *context, disassembledInstructi
static uint16_t extractDataFromMask(uint16_t data, uint16_t mask) {
int i, j;
uint16_t result = 0;
/* i counts through every bit of the data,
* j counts through every bit of the data we're copying out. */
for (i = 0, j = 0; i < 16; i++) {
@ -177,14 +177,14 @@ static uint16_t extractDataFromMask(uint16_t data, uint16_t mask) {
j++;
}
}
return result;
}
/* Disassembles/decodes operands back to their original form. */
static int disassembleOperands(disassembledInstruction *dInstruction) {
int i;
/* This should never happen */
if (!dInstruction || !dInstruction->instruction) {
return ERROR_INVALID_ARGUMENTS;

2
libr/asm/arch/avr/avr_instructionset.c
View File

@ -120,7 +120,7 @@ instructionInfo instructionSet[AVR_TOTAL_INSTRUCTIONS] = {
{"ser", 0xef0f, 1, {0x00f0, 0x0000}, {OPERAND_REGISTER_STARTR16, OPERAND_NONE}},
{"swap", 0x9402, 1, {0x01f0, 0x0000}, {OPERAND_REGISTER, OPERAND_NONE}},
{"tst", 0x2000, 1, {0x01f0, 0x020f}, {OPERAND_REGISTER, OPERAND_REGISTER_GHOST}},
{"adc", 0x1c00, 2, {0x01f0, 0x020f}, {OPERAND_REGISTER, OPERAND_REGISTER}},
{"add", 0x0c00, 2, {0x01f0, 0x020f}, {OPERAND_REGISTER, OPERAND_REGISTER}},
{"adiw", 0x9600, 2, {0x0030, 0x00cf}, {OPERAND_REGISTER_EVEN_PAIR_STARTR24, OPERAND_DATA}},

2
libr/asm/arch/avr/errorcodes.h
View File

@ -39,7 +39,7 @@ enum AVR_Disassembler_Error_Codes {
ERROR_FILE_READING_ERROR = -4,
ERROR_FILE_WRITING_ERROR = -5,
ERROR_MEMORY_ALLOCATION_ERROR = -6,
ERROR_IRRECOVERABLE = -7,
ERROR_IRRECOVERABLE = -7,
};
#endif

2
libr/asm/arch/cris/gnu/cris-dis.c
View File

@ -788,7 +788,7 @@ print_with_operands (const struct cris_opcode *opcodep,
*tp++ = 'c';
*tp++ = 'r';
break;
case '[':
case ']':
case ',':

2
libr/asm/arch/include/opcode/hppa.h
View File

@ -307,7 +307,7 @@ static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e
4) Opcodes without FLAG_STRICT should be ordered as follows:
register index opcodes, long immediate opcodes, and finally
short immediate opcodes. */
static const struct pa_opcode pa_opcodes[] =
{

8
libr/asm/arch/include/opcode/lanai.h
View File

@ -95,9 +95,9 @@ struct lanai_opcode {
#define F_ALIAS 1 /* Alias for a "real" instruction */
#define F_JSR 2 /* Subroutine call */
#define F_RI 0x10
#define F_RR 0x20
#define F_RRR 0x40
#define F_RI 0x10
#define F_RR 0x20
#define F_RRR 0x40
#define F_RM 0x80
#define F_RRM 0x100
#define F_BR 0x200
@ -152,7 +152,7 @@ Kinds of operands:
L 0x????ffff
l 0xffff????
k -j
o 16 bit signed offset
s 6 bit signed shift constant
i 10 bit signed immediate.

2
libr/asm/arch/include/wine-arm.h
View File

@ -144,7 +144,7 @@
#define ARM_DTM_LOAD (0x01<<20)
#define ARM_DTM_STORE 0x00
typedef struct _arm_label {
typedef struct _arm_label {
char name[100];
unsigned int at;
} arm_label;

2
libr/asm/arch/include/xtensa-isa.h
View File

@ -534,7 +534,7 @@ xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
extern int
xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Some register operands do not completely identify the register being
accessed. For example, the operand value may be added to an internal

8
libr/asm/arch/lanai/gnu/lanai-dis.c
View File

@ -63,8 +63,8 @@
#include "disas-asm.h"
static char *reg_names[] =
{ "r0", "r1", "pc", "ps", "sp", "fp", "r6", "r7",
"r8", "r9","r10","r11","r12","r13","r14","r15",
{ "r0", "r1", "pc", "ps", "sp", "fp", "r6", "r7",
"r8", "r9","r10","r11","r12","r13","r14","r15",
"r16","r17","r18","r19","r20","r21","r22","r23",
"r24","r25","r26","r27","r28","r29","r30","r31",
};
@ -179,7 +179,7 @@ print_insn_lanai (memaddr, info)
{
(*info->fprintf_func) (stream, " ");
switch (*s)
{
/* By default, just print the character. */
@ -204,7 +204,7 @@ print_insn_lanai (memaddr, info)
case 'd':
reg (X_RD (insn));
break;
#undef reg
case '4': /* Op1 (for RRR) */

8
libr/asm/arch/lanai/gnu/lanai-opc.c
View File

@ -143,7 +143,7 @@ L3_RI|L3_RI_OP(op)|((f)?L3_RI_F:0)|((h)?L3_RI_H:0)|(((op)==L3_AND)?L3_RS1(1):0))
| (((op)&L3_ARITH)?1<<6:0) | ((op)==L3_SH?1<<7:0) )
/* The order of the opcodes in the table is significant:
* The assembler requires that all instances of the same mnemonic must
be consecutive. If they aren't, the assembler will bomb at runtime.
@ -439,7 +439,7 @@ struct lanai_opcode lanai_opcodes[] = {
{ "leadz", LEADZ_PAIR(0) ,"1,d", F_LEADZ,0},
{ "leadz.f", LEADZ_PAIR(1) ,"1,d", F_LEADZ,0},
/* or */
{ "or", RR_PAIR(0,L3_OR) ,"1,2,d", F_RR,0},
@ -449,8 +449,8 @@ struct lanai_opcode lanai_opcodes[] = {
{ "or.f", RI_PAIR(L3_OR,1,0) ,"1,j,d", F_RI,0},
{ "or.f", RI_PAIR(L3_OR,1,1) ,"1,J,d", F_RI,0},
/* popc */
/* popc */
{ "popc", POPC_PAIR(0) ,"1,d", F_POPC,0},
{ "popc.f", POPC_PAIR(1) ,"1,d", F_POPC,0},

2
libr/asm/arch/tms320/c55x_plus/c55plus.c
View File

@ -45,6 +45,6 @@ int c55x_plus_disassemble(tms320_dasm_t *dasm, const ut8 *buf, int len) {
}
snprintf (dasm->syntax, sizeof (dasm->syntax), "%s", ins_decoded);
free (ins_decoded);
return next_ins_pos;
}

2
libr/asm/arch/tms320/c55x_plus/decode_funcs.c
View File

@ -103,7 +103,7 @@ char *get_AR_regs_class2(ut32 ins_bits, ut32 *ret_len, ut32 ins_pos, ut32 idx) {
res = malloc(50);
if (!res) {
return NULL;
}
}
if (op2 == 2) {
if (op) {
sprintf (res, "*ar%ld(short(#0x%lx))",

2
libr/asm/arch/tricore/gnu/tricore-dis.c
View File

@ -1390,7 +1390,7 @@ print_decoded_insn (memaddr, info)
abs = (dec_insn.cexp[i] << 1) + memaddr;
(*info->print_address_func) (abs, info);
break;
case 'c':
needs_creg = 1;
/* Fall through. */

2
libr/asm/arch/xap/dis.c
View File

@ -394,7 +394,7 @@ static int decode_known(struct state *s, struct directive *d) {
if (d->d_operand < 0) {
d->d_operand *= -1;
sign = "-";
}
}
} else {
d->d_operand = s->s_prefix_val | in->in_operand;
if (d->d_operand & 0x80) {

8
libr/asm/p/asm_x86_nz.c
View File

@ -1767,7 +1767,7 @@ static int oples(RAsm *a, ut8* data, const Opcode *op) {
int l = 0;
int offset = 0;
int mod = 0;
if (op->operands[1].type & OT_MEMORY) {
data[l++] = 0xc4;
if (op->operands[1].type & OT_GPREG) {
@ -1816,7 +1816,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) {
}
if (immediate_out_of_range (bits, op->operands[1].immediate)) {
return -1;
}
}
immediate = op->operands[1].immediate * op->operands[1].sign;
if (op->operands[0].type & OT_GPREG && !(op->operands[0].type & OT_MEMORY)) {
if ((op->operands[0].type & OT_DWORD)
@ -2470,7 +2470,7 @@ static int oppush(RAsm *a, ut8 *data, const Opcode *op) {
} else {
if (immediate_out_of_range (a->config->bits, op->operands[0].immediate)) {
return -1;
}
}
immediate = op->operands[0].immediate * op->operands[0].sign;
if (immediate >= 128 || immediate < -128) {
data[l++] = 0x68;
@ -5162,7 +5162,7 @@ static int assemble(RAsm *a, RAsmOp *ao, const char *str) {
LookupTable *lt_ptr;
int retval = -1;
Opcode instr = {0};
strncpy (op, str, sizeof (op) - 1);
op[sizeof (op) - 1] = '\0';
parseOpcode (a, op, &instr);

2
libr/bin/dbginfo.c
View File

@ -90,7 +90,7 @@ R_API char *r_bin_addr2text(RBin *bin, ut64 addr, int origin) {
return out;
}
R_FREE (file_line);
file[0] = 0;
if (r_bin_addr2line (bin, addr, file, sizeof (file), &line)) {
if (bin->srcdir && *bin->srcdir) {

6
libr/bin/format/bflt/bflt.c
View File

@ -15,13 +15,13 @@ R_IPI RBinAddr *r_bflt_get_entry(struct r_bin_bflt_obj *bin) {
static int bflt_init_hdr(struct r_bin_bflt_obj *bin) {
ut8 bhdr[BFLT_HDR_SIZE] = {0};
int len = r_buf_read_at (bin->b, 0, bhdr, BFLT_HDR_SIZE);
if (len < 1) {
R_LOG_WARN ("read bFLT hdr failed");
goto fail;
}
if (strncmp ((const char *)bhdr, "bFLT", 4)) {
R_LOG_WARN ("wrong magic number in bFLT file");
goto fail;
@ -31,7 +31,7 @@ static int bflt_init_hdr(struct r_bin_bflt_obj *bin) {
R_LOG_WARN ("couldn't allocate memory");
goto fail;
}
int i = 4;
p_hdr->rev = READ (bhdr, i);
p_hdr->entry = READ (bhdr, i);

2
libr/bin/format/elf/elf_write.c
View File

@ -48,7 +48,7 @@ ut64 Elf_(r_bin_elf_resize_section)(RBinFile *bf, const char *name, ut64 size) {
}
eprintf ("delta: %"PFMT64d"\n", delta);
/* rewrite rel's (imports) */
for (i = 0, shdrp = shdr; i < ehdr->e_shnum; i++, shdrp++) {
if (!strcmp (&strtab[shdrp->sh_name], ".got")) {

2
libr/bin/format/mdmp/mdmp.c
View File

@ -487,7 +487,7 @@ static bool r_bin_mdmp_init_directory_entry(struct r_bin_mdmp_obj *obj, struct m
for (i = 0; i < module_list.number_of_modules && offset < obj->size; i++) {
struct minidump_module *module = read_module (obj->b, offset);
if (!module) {
break;
break;
}
r_list_append (obj->streams.modules, module);
offset += sizeof (*module);

2
libr/bin/format/ne/ne.c
View File

@ -505,7 +505,7 @@ RList *r_bin_ne_get_relocs(r_bin_ne_obj_t *bin) {
reloc->type = R_BIN_RELOC_64;
break;
}
ut32 offset;
if (rel.flags & (IMPORTED_ORD | IMPORTED_NAME)) {
RBinImport *imp = R_NEW0 (RBinImport);

2
libr/bin/format/pe/pe.c
View File

@ -4289,7 +4289,7 @@ static struct r_bin_pe_section_t* PE_(r_bin_pe_get_sections)(RBinPEObj* pe) {
if (diff) {
pe_printf ("Warning: section %s not aligned to FileAlignment.\n", sections[j].name);
sections[j].paddr -= diff;
sections[j].size += diff;
sections[j].size += diff;
}
}
}

2
libr/bin/format/sfc/sfc_specs.h
View File

@ -46,7 +46,7 @@ R_PACKED (
typedef struct {
char name[0x15]; //game title.
ut8 rom_setup; //ROM setup (LoROM/HiROM, etc.)
ut8 rom_type;
ut8 rom_type;
ut8 rom_size; //in 1kb chunks
ut8 sram_size; //in 1kb chunks
ut8 dest_code;

4
libr/bin/mangling/cxx/cp-demangle.c
View File

@ -2617,7 +2617,7 @@ cplus_demangle_type (struct d_info *di)
ret = NULL;
can_subst = 1;
break;
case 'p':
/* Pack expansion. */
ret = d_make_comp (di, DEMANGLE_COMPONENT_PACK_EXPANSION,
@ -4390,7 +4390,7 @@ d_lookup_template_argument (struct d_print_info *dpi,
d_print_error (dpi);
return NULL;
}
return d_index_template_argument
(d_right (dpi->templates->template_decl),
dc->u.s_number.number);

12
libr/bin/mangling/microsoft_demangle.c
View File

@ -350,7 +350,7 @@ static size_t get_operator_code(const char *buf, RList *names_l, bool memorize)
str_info->len = strlen (str); \
str_info->str_ptr = strdup (str); \
r_list_append (names_l, str_info); \
}
}
SStrInfo *str_info;
size_t read_len = 1;
switch (*++buf) {
@ -668,7 +668,7 @@ static size_t get_namespace_and_name(const char *buf, STypeCodeStr *type_code_st
free (str.type_str);
continue;
}
// Nested name
if (*tmp == '?') {
read_len++;
@ -1022,7 +1022,7 @@ static inline void parse_type_modifier(SStateInfo *state, STypeCodeStr *type_cod
}
state->amount_of_read_chars += 2;
}
SDataType mod2;
i = get_ptr_modifier (*state->buff_for_parsing, &mod2);
state->buff_for_parsing += i;
@ -1213,7 +1213,7 @@ static EDemanglerErr parse_function_args(const char *sym, char **demangled_args,
if (*curr_pos != 'Z') {
err = eDemanglerErrUncorrectMangledSymbol;
}
copy_string (&func_str, ")", 0);
if (demangled_args) {
@ -1910,7 +1910,7 @@ static EDemanglerErr parse_microsoft_mangled_name(const char *sym, char **demang
// Managed function (Managed C++ or C++/CLI)
curr_pos += 3;
}
if (curr_pos[0] == '_') {
// TODO: __based()
curr_pos++;
@ -1987,7 +1987,7 @@ EDemanglerErr microsoft_demangle(SDemangler *demangler, char **demangled_name) {
err = eDemanglerErrMemoryAllocation;
goto microsoft_demangle_err;
}
if (!strncmp (demangler->symbol, ".?", 2)) {
err = parse_microsoft_rtti_mangled_name (demangler->symbol + 2, demangled_name, NULL);
} else {

2
libr/bin/mangling/rust.c
View File

@ -24,7 +24,7 @@ R_API char *r_bin_demangle_rust(RBinFile *binfile, const char *sym, ut64 vaddr)
char *str, *out, *in;
str = r_bin_demangle_cxx (binfile, sym, vaddr);
if (!str) {
return str;
}

4
libr/bin/mangling/swift-sd.c
View File

@ -273,7 +273,7 @@ R_API char *r_bin_demangle_swift(const char *s, bool syscmd, bool trylib) {
// XXX
q = getnum (p, NULL);
// _TF or __TW
if (IS_DIGIT (*p) || *p == 'v' || *p == 'I' || *p == 'o' || *p == 'T' || *p == 'V' || *p == 'M' || *p == 'C' || *p == 'F' || *p == 'W') {
if (!strncmp (p + 1, "SS", 2)) {
@ -511,7 +511,7 @@ R_API char *r_bin_demangle_swift(const char *s, bool syscmd, bool trylib) {
if (len <= (q_end - q) && q[len]) {
const char *s = getstring (q, len);
if (s && *s) {
if (is_first) {
if (is_first) {
strcat (out, is_generic?"<":": ");
is_first = 0;
}

2
libr/bin/p/bin_pe64.c
View File

@ -322,7 +322,7 @@ static RList *trycatch(RBinFile *bf) {
int i;
ut64 offset;
ut32 c_handler = 0;
struct PE_(r_bin_pe_obj_t) * bin = bf->o->bin_obj;
PE_(image_data_directory) *expdir = &bin->optional_header->DataDirectory[PE_IMAGE_DIRECTORY_ENTRY_EXCEPTION];
if (!expdir->Size) {

2
libr/bin/p/bin_write_mach0.c
View File

@ -21,7 +21,7 @@ static MachoPointers findLastCommand(RBinFile *bf) {
mp.ncmds_off = 0x10;
mp.sizeofcmds = bin->hdr.sizeofcmds;
mp.sizeofcmds_off = 0x14;
for (i = 0, off = 0x20 + bin->header_at; i < mp.ncmds; i++) {
ut32 loadc[2] = {0};
r_buf_read_at (bin->b, off, (ut8*)&loadc, sizeof (loadc));

4
libr/bin/pdb/tpi.c
View File

@ -178,7 +178,7 @@ static STypeInfo parse_simple_type(ut32 idx) {
simple_type->size = 8;
simple_type->type = strdup ("uint8_t*");
break;
case eT_INT16: // 16 bit
case eT_SHORT: // 16 bit short
@ -321,7 +321,7 @@ static STypeInfo parse_simple_type(ut32 idx) {
simple_type->size = 8;
simple_type->type = strdup ("uint64_t");
break;
case eT_PUQUAD:
case eT_PUINT8:
simple_type->size = 2;

2
libr/cons/grep.c
View File

@ -757,7 +757,7 @@ R_API void r_cons_grepbuf(void) {
r_strbuf_free (ob);
return;
}
const int ob_len = r_strbuf_length (ob);
if (ob_len >= cons->context->buffer_sz) {
cons->context->buffer_sz = ob_len + 1;

2
libr/cons/help.c
View File

@ -26,7 +26,7 @@ R_API void r_cons_cmd_help_json(const char *help[]) {
help_args = help[i + 1];
help_desc = help[i + 2];
if (r_str_startswith (help_cmd, usage_str)) {
pj_ks (pj, "root", help_cmd);
pj_ks (pj, "args", help_args);

2
libr/core/agraph.c
View File

@ -5048,7 +5048,7 @@ R_API RAGraph *create_agraph_from_graph(const RGraph/*<RGraphNodeInfo>*/ *graph)
// Cache lookup to build edges
HtPPOptions pointer_options = {0};
HtPP /*<RGraphNode *node, RANode *anode>*/ *hashmap = ht_pp_new_opt (&pointer_options);
if (!hashmap) {
r_agraph_free (result_agraph);
return NULL;

4
libr/core/cmd_anal.c
View File

@ -11351,7 +11351,7 @@ static int cmd_anal_all(RCore *core, const char *input) {
goto jacuzzi;
}
bool isPreludableArch = core->rasm->config->bits == 64 && r_str_startswith (r_config_get (core->config, "asm.arch"), "arm");
if (!didAap && isPreludableArch) {
didAap = true;
oldstr = r_print_rowlog (core->print, "Finding function preludes");
@ -12256,7 +12256,7 @@ static bool core_anal_abf(RCore *core, const char* input) {
if (!addr || addr == UT64_MAX) {
addr = core->offset;
}
RAnalBlock *bb, *bb2;
RListIter *iter, *iter2, *bbiter;
RAnalFunction *fcn;

2
libr/core/cmd_debug.c
View File

@ -4496,7 +4496,7 @@ static int cmd_debug_continue(RCore *core, const char *input) {
case 'r': // "dcr"
if (input[2] == '?') {
eprintf ("Usage: dcr: step over until ret instruction is found\n");
} else {
} else {
r_reg_arena_swap (core->dbg->reg, true);
r_debug_continue_until_optype (core->dbg, R_ANAL_OP_TYPE_RET, 1);
}

6
libr/core/cmd_flag.c
View File

@ -250,7 +250,7 @@ static RList *__childrenFlagsOf(RCore *core, RList *flags, const char *prefix) {
kw = r_str_ndup (fname, fname_len);
}
}
bool found = false;
r_list_foreach (list, iter2, fn) {
if (r_cons_is_breaked ()) {
@ -1594,14 +1594,14 @@ rep:
pj_ks (pj, "realname", flag->realname);
}
pj_end (pj);
} else {
// Print realname if exists and asm.flags.real is enabled
if (core->flags->realnames && flag->realname) {
r_cons_println (flag->realname);
} else {
r_cons_println (flag->name);
}
}
}
}
}

2
libr/core/cmd_meta.c
View File

@ -255,7 +255,7 @@ static bool print_addrinfo_json(void *user, const char *k, const char *v) {
const char *cached_existance = sdb_const_get (fscache, file, NULL);
bool file_exists = false;
if (cached_existance) {
file_exists = !strcmp (cached_existance, "1");
file_exists = !strcmp (cached_existance, "1");
} else {
if (r_file_exists (file)) {
sdb_set (fscache, file, "1", 0);

6
libr/core/cmd_open.c
View File

@ -316,7 +316,7 @@ static void cmd_open_bin(RCore *core, const char *input) {
r_list_foreach (ofiles, iter, desc) {
r_list_append (files, (void*)(size_t)desc->fd);
}
void *_fd;
r_list_foreach (files, iter, _fd) {
int fd = (size_t)_fd;
@ -338,7 +338,7 @@ static void cmd_open_bin(RCore *core, const char *input) {
break;
}
core->allbins = false;
char *v = input[2] ? strdup (input + 2) : NULL;
if (!v) {
eprintf ("Invalid arguments\n");
@ -1655,7 +1655,7 @@ static bool cmd_onn(RCore *core, const char* input) {
return true;
}
}
RIODesc *desc = r_io_open_at (core->io, ptr, perms, 0644, addr);
if (!desc || desc->fd == -1) {
R_LOG_ERROR ("Cannot open file '%s'", ptr);

4
libr/core/cmd_print.c
View File

@ -1581,7 +1581,7 @@ static void r_core_cmd_print_binformat(RCore *core, const char *arg, int mode) {
RBitmap *bm = r_bitmap_new (core->blocksize * 8);
r_bitmap_set_bytes (bm, core->block, core->blocksize);
RList *lart = lart_new ();
while (*arg && *arg != ' ') {
if (IS_DIGIT (*arg)) {
n = atoi (arg);
@ -7972,7 +7972,7 @@ static int cmd_print(void *data, const char *input) {
default:
if (*input && input[1] == 'j') {
r_cons_cmd_help_json (help_msg_p);
} else {
} else {
r_core_cmd_help (core, help_msg_p);
}
break;

4
libr/core/cmd_quit.c
View File

@ -61,9 +61,9 @@ static int cmd_quit(void *data, const char *input) {
core->num->value = 1;
}
if (input[1] == 'y') {
core->num->value += 10;
core->num->value += 10;
} else if (input[1] == 'n') {
core->num->value += 2;
core->num->value += 2;
}
return R_CMD_RC_QUIT;
}

6
libr/core/cmd_search_rop.c
View File

@ -301,7 +301,7 @@ continue_error:
}
return ct;
out_error:
FREE_ROP;
FREE_ROP;
r_list_free (constants);
return NULL;
}
@ -514,7 +514,7 @@ static char* rop_classify_arithmetic(RCore *core, RList *ropList) {
}
}
}
continue_error:
continue_error:
FREE_ROP;
}
free (op_result);
@ -522,7 +522,7 @@ continue_error:
return arithmetic;
out_error:
FREE_ROP;
free (op_result);
free (op_result);
free (op_result_r);
return NULL;
}

2
libr/core/core.c
View File

@ -511,7 +511,7 @@ static ut64 numvar_instruction(RCore *core, const char *input) {
//val += ret;
}
return val;
}
static ut64 num_callback(RNum *userptr, const char *str, int *ok) {

2
libr/core/disasm_stackptr.inc
View File

@ -9,7 +9,7 @@ static void ds_update_stackptr(RDisasmState *ds, RAnalOp *op) {
}
ds->ostackptr = ds->stackptr;
switch (op->stackop) {
case R_ANAL_STACK_RESET:
ds->stackptr = 0;
break;

2
libr/core/vslides.c
View File

@ -70,7 +70,7 @@ static void render(RCore *core, RList *list, int page) {
free (kv);
} else if (!strncmp (s, "--", 2)) {
// directive, do not print
} else if (*s == '#') {
char *ss = r_str_ss (s, 0, 0);
r_cons_printf ("%s\n", ss);

2
libr/core/windows_heap.c
View File

@ -188,7 +188,7 @@ static bool GetFirstHeapBlock(PDEBUG_HEAP_INFORMATION heapInfo, PHeapBlock hb) {
WPARAM flags = block[hb->index].flags;
UPDATE_FLAGS (hb, flags);
hb->index = index;
return true;
}

2
libr/core/zdiff.c
View File

@ -86,7 +86,7 @@ R_API int r_core_zdiff(RCore *c, RCore *c2) {
}
}
}
/* Diff functions */
// r_anal_diff_fcn (cores[0]->anal, cores[0]->anal->fcns, cores[1]->anal->fcns);

14
libr/debug/p/debug_native.c
View File

@ -152,7 +152,7 @@ static bool r_debug_native_attach(RDebug *dbg, int pid) {
#else
int ret = ptrace (PTRACE_ATTACH, pid, 0, 0);
if (ret != -1) {
eprintf ("Trying to attach to %d\n", pid);
R_LOG_INFO ("Trying to attach to %d", pid);
r_sys_perror ("ptrace (PT_ATTACH)");
}
return true;
@ -193,7 +193,7 @@ static bool r_debug_native_continue_syscall(RDebug *dbg, int pid, int num) {
errno = 0;
return ptrace (PTRACE_SYSCALL, pid, (void*)(size_t)pc, 0) == 0;
#else
eprintf ("TODO: continue syscall not implemented yet\n");
R_LOG_INFO ("TODO: continue syscall not implemented yet");
return false;
#endif
}
@ -506,15 +506,15 @@ static RDebugReasonType r_debug_native_wait(RDebug *dbg, int pid) {
if (reason == R_DEBUG_REASON_UNKNOWN) {
#endif
if (WIFEXITED (status)) {
eprintf ("child exited with status %d\n", WEXITSTATUS (status));
R_LOG_INFO ("child exited with status %d", WEXITSTATUS (status));
reason = R_DEBUG_REASON_DEAD;
} else if (WIFSIGNALED (status)) {
eprintf ("child received signal %d\n", WTERMSIG (status));
R_LOG_INFO ("child received signal %d", WTERMSIG (status));
reason = R_DEBUG_REASON_SIGNAL;
} else if (WIFSTOPPED (status)) {
if (WSTOPSIG (status) != SIGTRAP &&
WSTOPSIG (status) != SIGSTOP) {
eprintf ("Child stopped with signal %d\n", WSTOPSIG (status));
R_LOG_INFO ("Child stopped with signal %d", WSTOPSIG (status));
}
/* the ptrace documentation says GETSIGINFO is only necessary for
@ -532,7 +532,7 @@ static RDebugReasonType r_debug_native_wait(RDebug *dbg, int pid) {
#endif
#ifdef WIFCONTINUED
} else if (WIFCONTINUED (status)) {
eprintf ("child continued...\n");
R_LOG_INFO ("child continued");
reason = R_DEBUG_REASON_NONE;
#endif
} else if (status == 1) {
@ -555,7 +555,7 @@ static RDebugReasonType r_debug_native_wait(RDebug *dbg, int pid) {
/* if we still don't know what to do, we have a problem... */
if (reason == R_DEBUG_REASON_UNKNOWN) {
eprintf ("%s: no idea what happened... wtf?!?!\n", __func__);
R_LOG_INFO ("no idea what happened here");
reason = R_DEBUG_REASON_ERROR;
}
#endif // __APPLE__

2
libr/debug/p/native/arm.c
View File

@ -17,7 +17,7 @@ Flags
PL = n // positive
VS = V // overflow
VC = v // no overflow
// unsigned
HI = zC (!z && c)
LS = Z || c (z || !c)

10
libr/debug/p/native/windows/windows_debug.c
View File

@ -471,7 +471,7 @@ err_get_file_name_from_handle:
char *ret = r_sys_conv_win_to_utf8 (filename);
free (filename);
return ret;
}
}
return NULL;
}
@ -637,7 +637,7 @@ bool w32_select(RDebug *dbg, int pid, int tid) {
wrap->pi.hThread = th->hThread;
selected = th->tid;
break;
}
}
}
if (dbg->coreb.cfggeti (dbg->coreb.core, "dbg.threads")) {
@ -670,7 +670,7 @@ int w32_kill(RDebug *dbg, int pid, int tid, int sig) {
}
return true;
}
bool ret = false;
if (TerminateProcess (wrap->pi.hProcess, 1)) {
ret = true;
@ -950,7 +950,7 @@ RDebugReasonType w32_dbg_wait(RDebug *dbg, int pid) {
break;
default:
print_exception_event (&de);
if (is_exception_fatal (de.u.Exception.ExceptionRecord.ExceptionCode)) {
if (is_exception_fatal (de.u.Exception.ExceptionRecord.ExceptionCode)) {
next_event = 0;
dbg->reason.type = exception_to_reason (de.u.Exception.ExceptionRecord.ExceptionCode);
dbg->reason.tid = de.dwThreadId;
@ -1208,7 +1208,7 @@ static void __w32_info_user(RDebug *dbg, RDebugInfo *rdi) {
goto err___w32_info_user;
}
if (*usr_dom) {
rdi->usr = r_str_newf (W32_TCHAR_FSTR"\\"W32_TCHAR_FSTR, usr_dom, usr);
rdi->usr = r_str_newf (W32_TCHAR_FSTR"\\"W32_TCHAR_FSTR, usr_dom, usr);
} else {
rdi->usr = r_sys_conv_win_to_utf8 (usr);
}

2
libr/debug/p/native/xnu/xnu_debug.c
View File

@ -1547,7 +1547,7 @@ RList *xnu_dbg_maps(RDebug *dbg, int only_modules) {
}
}
}
r_list_append (list, m2);
r_list_append (list, m2);
}
r_list_sort (list, cmp);
r_list_free (modules);

2
libr/fs/p/fs_io.c
View File

@ -44,7 +44,7 @@ static int fs_io_read(RFSFile *file, ut64 addr, int len) {
if (!abs_path) {
return -1;
}
char *enc_uri = enbase (abs_path);
free (abs_path);
char *cmd = r_str_newf ("mg %s 0x%08"PFMT64x" %d", enc_uri, addr, len);

4
libr/include/sflib/common/sftypes.h
View File

@ -244,7 +244,7 @@ enum __socket_type
other similar things on the user level. */
#define SOCK_PACKET SOCK_PACKET
};
/* Protocol families. */
#define PF_UNSPEC 0 /* Unspecified. */
#define PF_LOCAL 1 /* Local to host (pipes and file-domain). */
@ -550,7 +550,7 @@ struct cmsghdr
#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
/**************** from ptrace.h *********/

2
libr/include/sflib/darwin-arm-64/ios-syscalls.py
View File

@ -6,7 +6,7 @@ def chk(x):
name = x[0]['flags'][0][8:]
sysnum = int(x[0]['opcode'].split(' ')[2], 16)
print ("%d\t%s"%(sysnum, name))
dev_pid = "23f88587e12c30376f8ab0b05236798fdfa4e853/4903"
r2 = r2pipe.open("frida://" + dev_pid)

7
libr/include/sflib/linux-arm-32/sflib.h
View File

@ -14,7 +14,6 @@
* Lesser General Public License for more details.
*/
/*
* Automatically generated by gensflib.py
* Mon Nov 28 13:53:31 2011
@ -23,12 +22,10 @@
#ifndef SFLIB_H
#define SFLIB_H
#include "sfsysnr.h"
#include "sfsyscall.h"
#include "../common/sftypes.h"
static inline _sfsyscall3( ssize_t, read, int, fd, void *, buf, size_t, count )
static inline _sfsyscall3( ssize_t, write, int, fd, const void *, buf, size_t, count )
static inline _sfsyscall3( int, open, const char *, pathname, int, flags, mode_t, mode )
@ -326,9 +323,7 @@ static inline _sfsyscall1( time_t, time, time_t *, t )
// inotify_init1
// preadv
// pwritev
//#include "../common/sfsocketcall.h"
#endif /* SFLIB_H */

5
libr/include/sflib/linux-arm-64/sflib.h
View File

@ -326,9 +326,6 @@ static inline _sfsyscall1( time_t, time, time_t *, t )
// inotify_init1
// preadv
// pwritev
//#include "../common/sfsocketcall.h"
#endif /* SFLIB_H */

6
libr/include/sflib/linux-x86-32/sflib.h
View File

@ -23,12 +23,10 @@
#ifndef SFLIB_H
#define SFLIB_H
#include "sfsysnr.h"
#include "sfsyscall.h"
#include "../common/sftypes.h"
static inline _sfsyscall1(void, exit, int, status)
static inline _sfsyscall0( pid_t, fork )
static inline _sfsyscall3( ssize_t, read, int, fd, void *, buf, size_t, count )
@ -218,9 +216,7 @@ static inline _sfsyscall2( int, capget, cap_user_header_t, header, cap_user_data
static inline _sfsyscall0( pid_t, vfork )
// getrlimit
static inline _sfsyscall6(void *,mmap, void *,start, size_t,length, int,prot , int,flags, int,fd, off_t,offset)
#include "../common/sfsocketcall.h"
#endif /* SFLIB_H */

4
libr/include/sflib/linux-x86-64/sflib.h
View File

@ -326,8 +326,8 @@ static inline _sfsyscall1( time_t, time, time_t *, t )
// inotify_init1
// preadv
// pwritev
//#include "../common/sfsocketcall.h"

2
libr/io/io_plugin.c
View File

@ -94,7 +94,7 @@ R_API int r_io_plugin_list_json(RIO *io) {
if (!pj) {
return 0;
}
char str[4];
int n = 0;
pj_a (pj);

2
libr/io/p/io_rap.c
View File

@ -269,7 +269,7 @@ static char *__rap_system(RIO *io, RIODesc *fd, const char *command) {
}
#endif
#endif
return NULL;
}

2
libr/io/p/io_w32dbg.c
View File

@ -141,7 +141,7 @@ static int __open_proc(RIO *io, int pid, bool attach) {
RW32Dw *wrap = (RW32Dw *)io->dbgwrap;
wrap->pi.dwProcessId = pid;
if (attach) {
/* Attach to the process */
/* Attach to the process */
wrap->params.type = W32_ATTACH;
r_w32dw_waitret (wrap);
if (!r_w32dw_ret (wrap)) {

2
libr/io/p/io_xattr.c
View File

@ -81,7 +81,7 @@ static RIODesc *__open(RIO *io, const char *pathname, int rw, int mode) {
if (!attrvalue || size < 1) {
return NULL;
}
RIOMalloc *mal = R_NEW0 (RIOMalloc);
if (!mal) {
return NULL;

4
libr/io/p_cache.c
View File

@ -156,7 +156,7 @@ R_API int r_io_desc_cache_read(RIODesc *desc, ut64 paddr, ut8 *buf, int len) {
cbaddr = paddr % R_IO_DESC_CACHE_SIZE;
while (amount < len) {
// get an existing desc-cache, if it exists
if (!(cache = (RIODescCache *)ht_up_find (desc->cache, caddr, NULL))) {
if (!(cache = (RIODescCache *)ht_up_find (desc->cache, caddr, NULL))) {
amount += (R_IO_DESC_CACHE_SIZE - cbaddr);
ptr += (R_IO_DESC_CACHE_SIZE - cbaddr);
goto beach;
@ -333,7 +333,7 @@ static bool __desc_cache_cleanup_cb(void *user, const ut64 k, const void *v) {
}
if (size <= (blockaddr + R_IO_DESC_CACHE_SIZE - 1)) {
//this looks scary, but it isn't
byteaddr = (int)(size - blockaddr) - 1;
byteaddr = (int)(size - blockaddr) - 1;
cache->cached &= cleanup_masks[byteaddr];
}
return true;

4
libr/lang/p/lib.c
View File

@ -25,8 +25,8 @@ static bool lang_lib_file_run(RLang *user, const char *file) {
if (!r_file_exists (libpath)) {
free (libpath);
return false;
}
}
lib = r_lib_dl_open (libpath);
if (lib) {
void (*fcn)(RCore *);

2
libr/lang/p/pipe.c
View File

@ -149,7 +149,7 @@ static bool lang_pipe_run(RLang *lang, const char *code, int len) {
}
return false;
}
env ("R2PIPE_IN", input[0]);
env ("R2PIPE_OUT", output[1]);

4
libr/magic/apprentice.c
View File

@ -600,7 +600,7 @@ static int apprentice_load(RMagic *ms, struct r_magic **magicp, ut32 *nmagicp, c
wchar_t *wcpath;
char *cfname;
char subfn[1024];
#else
#else
DIR *dir;
struct dirent *d;
char subfn[MAXPATHLEN];
@ -1522,7 +1522,7 @@ static int check_format(RMagic *ms, struct r_magic *m) {
if (file_nformats != file_nnames) {
return -1;
}
}
if (m->type >= file_nformats) {
file_magwarn(ms, "Internal error inconsistency between "

12
libr/magic/d/default/apple
View File

@ -321,7 +321,7 @@
#>0x230 string x first type: %s,
#>0x210 string x name: %s,
#>0x254 belong x number of blocks: %d,
#>0x400 beshort 0x504D
#>0x400 beshort 0x504D
#>>0x430 string x second type: %s,
#>>0x410 string x name: %s,
#>>0x454 belong x number of blocks: %d,
@ -329,11 +329,11 @@
#>>>0x630 string x third type: %s,
#>>>0x610 string x name: %s,
#>>>0x654 belong x number of blocks: %d,
#>>0x800 beshort 0x504D
#>>0x800 beshort 0x504D
#>>>0x830 string x fourth type: %s,
#>>>0x810 string x name: %s,
#>>>0x854 belong x number of blocks: %d,
#>>>0xa00 beshort 0x504D
#>>>0xa00 beshort 0x504D
#>>>>0xa30 string x fifth type: %s,
#>>>>0xa10 string x name: %s,
#>>>>0xa54 belong x number of blocks: %d
@ -347,15 +347,15 @@
#>0x230 string x first type: %s,
#>0x210 string x name: %s,
#>0x254 belong x number of blocks: %d,
#>0x400 beshort 0x504D
#>0x400 beshort 0x504D
#>>0x430 string x second type: %s,
#>>0x410 string x name: %s,
#>>0x454 belong x number of blocks: %d,
#>>0x800 beshort 0x504D
#>>0x800 beshort 0x504D
#>>>0x830 string x third type: %s,
#>>>0x810 string x name: %s,
#>>>0x854 belong x number of blocks: %d,
#>>>0xa00 beshort 0x504D
#>>>0xa00 beshort 0x504D
#>>>>0xa30 string x fourth type: %s,
#>>>>0xa10 string x name: %s,
#>>>>0xa54 belong x number of blocks: %d

6
libr/magic/d/default/archive
View File

@ -78,11 +78,11 @@
# MS Compress
4 string \x88\xf0\x27 MS Compress archive data
# updated by Joerg Jenderek
>9 string \0
>>0 string KWAJ
>9 string \0
>>0 string KWAJ
>>>7 string \321\003 MS Compress archive data
>>>>14 ulong >0 \b, original size: %d byte(s)
>>>>18 ubyte >0x65
>>>>18 ubyte >0x65
>>>>>18 string x \b, was %.8s
>>>>>(10.b-4) string x \b.%.3s

4
libr/magic/d/default/compressed
View File

@ -21,7 +21,7 @@
#
0 string 7z\274\257\047\034 7-zip archive data,
>6 byte <0 invalid
>6 byte 0
>6 byte 0
>>7 byte 0 invalid
>6 byte >20 invalid
>6 byte x version %d
@ -81,7 +81,7 @@
# case you don't know how to set a date in your gzip files. Brilliant.
>4 lelong =0 \b, NULL date
>4 lelong <0 \b, invalid date
>4 lelong >0
>4 lelong >0
>>4 lelong <694224000 \b, invalid date
>>4 lelong =694224000 \b, invalid date
>>4 lelong >694224000 \b, last modified

12
libr/magic/d/default/database
View File

@ -114,28 +114,28 @@
#>>>0x04 byte 8 incrementing secondary index .XGn file
## XBase database files
#0 byte 0x02
#0 byte 0x02
#>8 leshort >0
#>>12 leshort 0 FoxBase
#!:mime application/x-dbf
#>>>0x04 lelong 0 (no records)
#>>>0x04 lelong >0 (%ld records)
#
#0 byte 0x03
#0 byte 0x03
#!:mime application/x-dbf
#>8 leshort >0
#>>12 leshort 0 FoxBase+, FoxPro, dBaseIII+, dBaseIV, no memo
#>>>0x04 lelong 0 (no records)
#>>>0x04 lelong >0 (%ld records)
#
#0 byte 0x04
#0 byte 0x04
#!:mime application/x-dbf
#>8 leshort >0
#>>12 leshort 0 dBASE IV no memo file
#>>>0x04 lelong 0 (no records)
#>>>0x04 lelong >0 (%ld records)
#
#0 byte 0x05
#0 byte 0x05
#!:mime application/x-dbf
#>8 leshort >0
#>>12 leshort 0 dBASE V no memo file
@ -163,7 +163,7 @@
#>>>0x04 lelong 0 (no records)
#>>>0x04 lelong >0 (%ld records)
#
#0 byte 0x83
#0 byte 0x83
#!:mime application/x-dbf
#>8 leshort >0
#>>12 leshort 0 FoxBase+, dBaseIII+ with memo
@ -177,7 +177,7 @@
#>>>0x04 lelong 0 (no records)
#>>>0x04 lelong >0 (%ld records)
#
#0 byte 0x8e
#0 byte 0x8e
#!:mime application/x-dbf
#>8 leshort >0
#>>12 leshort 0 dBaseIV with SQL Table

638
libr/magic/d/default/filesystems
View File

File diff suppressed because it is too large Load Diff

30
libr/magic/d/default/jpeg
View File

@ -41,85 +41,85 @@
# # is possible. And both endians are possible...
# # The combinations included below are from real-world JPEGs.
# # Little-endian
# >>12 string II
# >>12 string II
# # IFD 0 Entry #5:
# >>>70 leshort 0x8769
# # EXIF IFD Entry #1:
# >>>>(78.l+14) leshort 0x9000
# >>>>(78.l+14) leshort 0x9000
# >>>>>(78.l+23) byte x %c
# >>>>>(78.l+24) byte x \b.%c
# >>>>>(78.l+25) byte !0x30 \b%c
# # IFD 0 Entry #9:
# >>>118 leshort 0x8769
# # EXIF IFD Entry #3:
# >>>>(126.l+38) leshort 0x9000
# >>>>(126.l+38) leshort 0x9000
# >>>>>(126.l+47) byte x %c
# >>>>>(126.l+48) byte x \b.%c
# >>>>>(126.l+49) byte !0x30 \b%c
# # IFD 0 Entry #10
# >>>130 leshort 0x8769
# # EXIF IFD Entry #3:
# >>>>(138.l+38) leshort 0x9000
# >>>>(138.l+38) leshort 0x9000
# >>>>>(138.l+47) byte x %c
# >>>>>(138.l+48) byte x \b.%c
# >>>>>(138.l+49) byte !0x30 \b%c
# # EXIF IFD Entry #4:
# >>>>(138.l+50) leshort 0x9000
# >>>>(138.l+50) leshort 0x9000
# >>>>>(138.l+59) byte x %c
# >>>>>(138.l+60) byte x \b.%c
# >>>>>(138.l+61) byte !0x30 \b%c
# # EXIF IFD Entry #5:
# >>>>(138.l+62) leshort 0x9000
# >>>>(138.l+62) leshort 0x9000
# >>>>>(138.l+71) byte x %c
# >>>>>(138.l+72) byte x \b.%c
# >>>>>(138.l+73) byte !0x30 \b%c
# # IFD 0 Entry #11
# >>>142 leshort 0x8769
# # EXIF IFD Entry #3:
# >>>>(150.l+38) leshort 0x9000
# >>>>(150.l+38) leshort 0x9000
# >>>>>(150.l+47) byte x %c
# >>>>>(150.l+48) byte x \b.%c
# >>>>>(150.l+49) byte !0x30 \b%c
# # EXIF IFD Entry #4:
# >>>>(150.l+50) leshort 0x9000
# >>>>(150.l+50) leshort 0x9000
# >>>>>(150.l+59) byte x %c
# >>>>>(150.l+60) byte x \b.%c
# >>>>>(150.l+61) byte !0x30 \b%c
# # EXIF IFD Entry #5:
# >>>>(150.l+62) leshort 0x9000
# >>>>(150.l+62) leshort 0x9000
# >>>>>(150.l+71) byte x %c
# >>>>>(150.l+72) byte x \b.%c
# >>>>>(150.l+73) byte !0x30 \b%c
# # Big-endian
# >>12 string MM
# >>12 string MM
# # IFD 0 Entry #9:
# >>>118 beshort 0x8769
# # EXIF IFD Entry #1:
# >>>>(126.L+14) beshort 0x9000
# >>>>(126.L+14) beshort 0x9000
# >>>>>(126.L+23) byte x %c
# >>>>>(126.L+24) byte x \b.%c
# >>>>>(126.L+25) byte !0x30 \b%c
# # EXIF IFD Entry #3:
# >>>>(126.L+38) beshort 0x9000
# >>>>(126.L+38) beshort 0x9000
# >>>>>(126.L+47) byte x %c
# >>>>>(126.L+48) byte x \b.%c
# >>>>>(126.L+49) byte !0x30 \b%c
# # IFD 0 Entry #10
# >>>130 beshort 0x8769
# # EXIF IFD Entry #3:
# >>>>(138.L+38) beshort 0x9000
# >>>>(138.L+38) beshort 0x9000
# >>>>>(138.L+47) byte x %c
# >>>>>(138.L+48) byte x \b.%c
# >>>>>(138.L+49) byte !0x30 \b%c
# # EXIF IFD Entry #5:
# >>>>(138.L+62) beshort 0x9000
# >>>>(138.L+62) beshort 0x9000
# >>>>>(138.L+71) byte x %c
# >>>>>(138.L+72) byte x \b.%c
# >>>>>(138.L+73) byte !0x30 \b%c
# # IFD 0 Entry #11
# >>>142 beshort 0x8769
# # EXIF IFD Entry #4:
# >>>>(150.L+50) beshort 0x9000
# >>>>(150.L+50) beshort 0x9000
# >>>>>(150.L+59) byte x %c
# >>>>>(150.L+60) byte x \b.%c
# >>>>>(150.L+61) byte !0x30 \b%c

30
libr/magic/d/default/microsoft
View File

@ -6,7 +6,7 @@
# .BAT files (Daniel Quinlan, quinlan@yggdrasil.com)
# updated by Joerg Jenderek
0 string @
0 string @
#>1 string/cB \ echo\ off MS-DOS batch file text
#>1 string/cB echo\ off MS-DOS batch file text
#>1 string/cB rem\ MS-DOS batch file text
@ -276,24 +276,24 @@
##### Can be problematic because reading ffffffff results in identified hit
### 0 belong 0xffffffff DOS executable (device driver)
### #CMD640X2.SYS
### >10 string >\x23
### >>10 string !\x2e
### >>>17 string <\x5B
### >10 string >\x23
### >>10 string !\x2e
### >>>17 string <\x5B
### >>>>10 string x \b, name: %.8s
### #UDMA.SYS KEYB.SYS CMD640X2.SYS
### >10 string <\x41
### >>12 string >\x40
### >>>10 string !$
### >10 string <\x41
### >>12 string >\x40
### >>>10 string !$
### >>>>12 string x \b, name: %.8s
### #BTCDROM.SYS ASPICD.SYS
### >22 string >\x40
### >>22 string <\x5B
### >>>23 string <\x5B
### >22 string >\x40
### >>22 string <\x5B
### >>>23 string <\x5B
### >>>>22 string x \b, name: %.8s
### #ATAPICD.SYS
### >76 string \0
### >>77 string >\x40
### >>>77 string <\x5B
### >76 string \0
### >>77 string >\x40
### >>>77 string <\x5B
### >>>>77 string x \b, name: %.8s
### #0 byte 0x8c DOS executable (COM)
### # 0xeb conflicts with "sequent" magic
@ -310,8 +310,8 @@
### # (32-bit COMBOOT) programs *.C32 contain 32-bit code and run in flat-memory 32-bit protected mode
### # start with assembler instructions mov eax,21cd4cffh
### >1 lelong 0x21cd4cff (32-bit COMBOOT)
0 string \x81\xfc
>4 string \x77\x02\xcd\x20\xb9
0 string \x81\xfc
>4 string \x77\x02\xcd\x20\xb9
>>36 string UPX! FREE-DOS executable (COM), UPX compressed
252 string Must\ have\ DOS\ version DR-DOS executable (COM)
# many compressed/converted COMs start with a copy loop instead of a jump

18
libr/magic/d/default/netbsd
View File

@ -12,7 +12,7 @@
# >16 belong >0 not stripped
#
# 0 belong&0377777777 041400413 a.out NetBSD/i386 demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -34,7 +34,7 @@
# >32 lelong !0 (signal %d)
#
# 0 belong&0377777777 041600413 a.out NetBSD/m68k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable
@ -56,7 +56,7 @@
# >32 belong !0 (signal %d)
#
# 0 belong&0377777777 042000413 a.out NetBSD/m68k4k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <4096 shared library
# >>20 belong =4096 dynamically linked executable
# >>20 belong >4096 dynamically linked executable
@ -78,7 +78,7 @@
# >32 belong !0 (signal %d)
#
# 0 belong&0377777777 042200413 a.out NetBSD/ns32532 demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -103,7 +103,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 042400413 a.out NetBSD/sparc demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable
@ -125,7 +125,7 @@
# >32 belong !0 (signal %d)
#
# 0 belong&0377777777 042600413 a.out NetBSD/pmax demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -147,7 +147,7 @@
# >32 lelong !0 (signal %d)
#
# 0 belong&0377777777 043000413 a.out NetBSD/vax 1k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -169,7 +169,7 @@
# >32 lelong !0 (signal %d)
#
# 0 belong&0377777777 045400413 a.out NetBSD/vax 4k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -191,7 +191,7 @@
# >32 lelong !0 (signal %d)
#
# 0 belong&0377777777 043400413 a.out NetBSD/mips demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable

18
libr/magic/d/default/openbsd
View File

@ -12,7 +12,7 @@
# >16 belong >0 not stripped
#
# 0 belong&0377777777 041400413 OpenBSD/i386 demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -33,7 +33,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 041600413 OpenBSD/m68k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable
@ -54,7 +54,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 042000413 OpenBSD/m68k4k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <4096 shared library
# >>20 belong =4096 dynamically linked executable
# >>20 belong >4096 dynamically linked executable
@ -75,7 +75,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 042200413 OpenBSD/ns32532 demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -96,7 +96,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 042400413 OpenBSD/sparc demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable
@ -117,7 +117,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 042600413 OpenBSD/pmax demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -138,7 +138,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 043000413 OpenBSD/vax1k demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -159,7 +159,7 @@
# >12 string >\0 from '%s'
#
# 0 belong&0377777777 045400413 OpenBSD/vax demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 lelong <4096 shared library
# >>20 lelong =4096 dynamically linked executable
# >>20 lelong >4096 dynamically linked executable
@ -193,7 +193,7 @@
#
# # OpenBSD/mips64
# 0 belong&0377777777 047400413 OpenBSD/mips64 demand paged
# >0 byte &0x80
# >0 byte &0x80
# >>20 belong <8192 shared library
# >>20 belong =8192 dynamically linked executable
# >>20 belong >8192 dynamically linked executable

4
libr/magic/d/default/riff
View File

@ -15,7 +15,7 @@
>>18 leshort x \b, %d entries
# RIFF Device Independent Bitmap format
>8 string RDIB \b, device-independent bitmap
>>16 string BM
>>16 string BM
>>>30 leshort 12 \b, OS/2 1.x format
>>>>34 leshort x \b, %d x
>>>>36 leshort x %d
@ -191,7 +191,7 @@
>>18 beshort x \b, %d entries
# RIFF Device Independent Bitmap format
>8 string RDIB \b, device-independent bitmap
>>16 string BM
>>16 string BM
>>>30 beshort 12 \b, OS/2 1.x format
>>>>34 beshort x \b, %d x
>>>>36 beshort x %d

4
libr/magic/d/default/vorbis
View File

@ -89,7 +89,7 @@
# in a different place, so we must use an indirect offset.
>>>(84.b+85) string \x03vorbis
>>>>(84.b+96) string/c Xiphophorus\ libVorbis\ I \b, created by: Xiphophorus libVorbis I
>>>>>(84.b+120) string >00000000
>>>>>(84.b+120) string >00000000
# Map to beta version numbers:
>>>>>>(84.b+120) string <20000508 (<beta1, prepublic)
>>>>>>(84.b+120) string 20000508 (1.0 beta 1 or beta 2)
@ -111,7 +111,7 @@
>>>>>>(84.b+120) string >20011231 (pre-1.0 CVS)
# For the 1.0 release, Xiphophorus is replaced by Xiph.Org
>>>>(84.b+96) string/c Xiph.Org\ libVorbis\ I \b, created by: Xiph.Org libVorbis I
>>>>>(84.b+117) string >00000000
>>>>>(84.b+117) string >00000000
>>>>>>(84.b+117) string <20020717 (pre-1.0 CVS)
>>>>>>(84.b+117) string 20020717 (1.0)
>>>>>>(84.b+117) string 20030909 (1.0.1)

Some files were not shown because too many files have changed in this diff Show More