diff --git a/ChangeLog b/ChangeLog
index 00a3a7af81..9c8fabdebe 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2005-06-07  Manish Singh  <yosh@gimp.org>
+
+	* app/base/cpu-accel.[ch]: detect SSE3.
+
 2005-06-07  Manish Singh  <yosh@gimp.org>
 
 	* app/actions/dockable-actions.c (dockable_actions_update): cast
diff --git a/app/base/cpu-accel.c b/app/base/cpu-accel.c
index 28742cfdb2..c010402f4f 100644
--- a/app/base/cpu-accel.c
+++ b/app/base/cpu-accel.c
@@ -74,6 +74,11 @@ enum
   ARCH_X86_CYRIX_FEATURE_MMXEXT   = 1 << 24
 };
 
+enum
+{
+  ARCH_X86_INTEL_FEATURE_PNI      = 1 << 0
+};
+
 #if !defined(ARCH_X86_64) && defined(PIC)
 #define cpuid(op,eax,ebx,ecx,edx)  \
   __asm__ ("movl %%ebx, %%esi\n\t" \
@@ -187,6 +192,9 @@ arch_accel_intel (void)
 
     if (edx & ARCH_X86_INTEL_FEATURE_XMM2)
       caps |= CPU_ACCEL_X86_SSE2;
+
+    if (ecx & ARCH_X86_INTEL_FEATURE_PNI)
+      caps |= CPU_ACCEL_X86_SSE3;
 #endif /* USE_SSE */
   }
 #endif /* USE_MMX */
@@ -466,6 +474,8 @@ cpu_accel_print_results (void)
               (cpu_accel() & CPU_ACCEL_X86_SSE)     ? "yes" : "no");
   g_printerr ("  sse2    : %s\n",
               (cpu_accel() & CPU_ACCEL_X86_SSE2)    ? "yes" : "no");
+  g_printerr ("  sse3    : %s\n",
+              (cpu_accel() & CPU_ACCEL_X86_SSE3)    ? "yes" : "no");
 #endif
 #ifdef ARCH_PPC
   g_printerr ("  altivec : %s\n",
diff --git a/app/base/cpu-accel.h b/app/base/cpu-accel.h
index 2ff7fa3e90..9871a29e05 100644
--- a/app/base/cpu-accel.h
+++ b/app/base/cpu-accel.h
@@ -33,6 +33,7 @@
 #define CPU_ACCEL_X86_MMXEXT     0x20000000
 #define CPU_ACCEL_X86_SSE        0x10000000
 #define CPU_ACCEL_X86_SSE2       0x08000000
+#define CPU_ACCEL_X86_SSE3       0x02000000
 
 /* powerpc accelerations */
 #define CPU_ACCEL_PPC_ALTIVEC    0x04000000
diff --git a/libgimpbase/gimpcpuaccel.c b/libgimpbase/gimpcpuaccel.c
index 28742cfdb2..c010402f4f 100644
--- a/libgimpbase/gimpcpuaccel.c
+++ b/libgimpbase/gimpcpuaccel.c
@@ -74,6 +74,11 @@ enum
   ARCH_X86_CYRIX_FEATURE_MMXEXT   = 1 << 24
 };
 
+enum
+{
+  ARCH_X86_INTEL_FEATURE_PNI      = 1 << 0
+};
+
 #if !defined(ARCH_X86_64) && defined(PIC)
 #define cpuid(op,eax,ebx,ecx,edx)  \
   __asm__ ("movl %%ebx, %%esi\n\t" \
@@ -187,6 +192,9 @@ arch_accel_intel (void)
 
     if (edx & ARCH_X86_INTEL_FEATURE_XMM2)
       caps |= CPU_ACCEL_X86_SSE2;
+
+    if (ecx & ARCH_X86_INTEL_FEATURE_PNI)
+      caps |= CPU_ACCEL_X86_SSE3;
 #endif /* USE_SSE */
   }
 #endif /* USE_MMX */
@@ -466,6 +474,8 @@ cpu_accel_print_results (void)
               (cpu_accel() & CPU_ACCEL_X86_SSE)     ? "yes" : "no");
   g_printerr ("  sse2    : %s\n",
               (cpu_accel() & CPU_ACCEL_X86_SSE2)    ? "yes" : "no");
+  g_printerr ("  sse3    : %s\n",
+              (cpu_accel() & CPU_ACCEL_X86_SSE3)    ? "yes" : "no");
 #endif
 #ifdef ARCH_PPC
   g_printerr ("  altivec : %s\n",
diff --git a/libgimpbase/gimpcpuaccel.h b/libgimpbase/gimpcpuaccel.h
index 2ff7fa3e90..9871a29e05 100644
--- a/libgimpbase/gimpcpuaccel.h
+++ b/libgimpbase/gimpcpuaccel.h
@@ -33,6 +33,7 @@
 #define CPU_ACCEL_X86_MMXEXT     0x20000000
 #define CPU_ACCEL_X86_SSE        0x10000000
 #define CPU_ACCEL_X86_SSE2       0x08000000
+#define CPU_ACCEL_X86_SSE3       0x02000000
 
 /* powerpc accelerations */
 #define CPU_ACCEL_PPC_ALTIVEC    0x04000000