610 lines
14 KiB
C
610 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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#include <linux/coresight.h>
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#include <linux/coresight-pmu.h>
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/perf_event.h>
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#include <linux/percpu-defs.h>
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#include <linux/slab.h>
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#include <linux/stringhash.h>
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#include <linux/types.h>
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#include <linux/workqueue.h>
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#include "coresight-etm-perf.h"
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#include "coresight-priv.h"
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static struct pmu etm_pmu;
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static bool etm_perf_up;
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static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
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static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
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/* ETMv3.5/PTM's ETMCR is 'config' */
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PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
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PMU_FORMAT_ATTR(contextid, "config:" __stringify(ETM_OPT_CTXTID));
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PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
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PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
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/* Sink ID - same for all ETMs */
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PMU_FORMAT_ATTR(sinkid, "config2:0-31");
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static struct attribute *etm_config_formats_attr[] = {
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&format_attr_cycacc.attr,
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&format_attr_contextid.attr,
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&format_attr_timestamp.attr,
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&format_attr_retstack.attr,
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&format_attr_sinkid.attr,
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NULL,
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};
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static const struct attribute_group etm_pmu_format_group = {
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.name = "format",
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.attrs = etm_config_formats_attr,
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};
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static struct attribute *etm_config_sinks_attr[] = {
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NULL,
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};
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static const struct attribute_group etm_pmu_sinks_group = {
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.name = "sinks",
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.attrs = etm_config_sinks_attr,
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};
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static const struct attribute_group *etm_pmu_attr_groups[] = {
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&etm_pmu_format_group,
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&etm_pmu_sinks_group,
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NULL,
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};
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static inline struct list_head **
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etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
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{
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return per_cpu_ptr(data->path, cpu);
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}
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static inline struct list_head *
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etm_event_cpu_path(struct etm_event_data *data, int cpu)
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{
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return *etm_event_cpu_path_ptr(data, cpu);
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}
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static void etm_event_read(struct perf_event *event) {}
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static int etm_addr_filters_alloc(struct perf_event *event)
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{
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struct etm_filters *filters;
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int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
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filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
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if (!filters)
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return -ENOMEM;
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if (event->parent)
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memcpy(filters, event->parent->hw.addr_filters,
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sizeof(*filters));
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event->hw.addr_filters = filters;
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return 0;
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}
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static void etm_event_destroy(struct perf_event *event)
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{
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kfree(event->hw.addr_filters);
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event->hw.addr_filters = NULL;
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}
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static int etm_event_init(struct perf_event *event)
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{
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int ret = 0;
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if (event->attr.type != etm_pmu.type) {
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ret = -ENOENT;
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goto out;
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}
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ret = etm_addr_filters_alloc(event);
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if (ret)
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goto out;
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event->destroy = etm_event_destroy;
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out:
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return ret;
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}
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static void free_sink_buffer(struct etm_event_data *event_data)
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{
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int cpu;
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cpumask_t *mask = &event_data->mask;
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struct coresight_device *sink;
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if (WARN_ON(cpumask_empty(mask)))
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return;
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if (!event_data->snk_config)
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return;
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cpu = cpumask_first(mask);
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sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
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sink_ops(sink)->free_buffer(event_data->snk_config);
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}
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static void free_event_data(struct work_struct *work)
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{
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int cpu;
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cpumask_t *mask;
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struct etm_event_data *event_data;
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event_data = container_of(work, struct etm_event_data, work);
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mask = &event_data->mask;
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/* Free the sink buffers, if there are any */
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free_sink_buffer(event_data);
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for_each_cpu(cpu, mask) {
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struct list_head **ppath;
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ppath = etm_event_cpu_path_ptr(event_data, cpu);
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if (!(IS_ERR_OR_NULL(*ppath)))
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coresight_release_path(*ppath);
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*ppath = NULL;
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}
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free_percpu(event_data->path);
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kfree(event_data);
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}
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static void *alloc_event_data(int cpu)
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{
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cpumask_t *mask;
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struct etm_event_data *event_data;
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/* First get memory for the session's data */
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event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
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if (!event_data)
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return NULL;
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mask = &event_data->mask;
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if (cpu != -1)
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cpumask_set_cpu(cpu, mask);
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else
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cpumask_copy(mask, cpu_present_mask);
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/*
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* Each CPU has a single path between source and destination. As such
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* allocate an array using CPU numbers as indexes. That way a path
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* for any CPU can easily be accessed at any given time. We proceed
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* the same way for sessions involving a single CPU. The cost of
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* unused memory when dealing with single CPU trace scenarios is small
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* compared to the cost of searching through an optimized array.
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*/
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event_data->path = alloc_percpu(struct list_head *);
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if (!event_data->path) {
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kfree(event_data);
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return NULL;
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}
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return event_data;
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}
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static void etm_free_aux(void *data)
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{
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struct etm_event_data *event_data = data;
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schedule_work(&event_data->work);
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}
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static void *etm_setup_aux(struct perf_event *event, void **pages,
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int nr_pages, bool overwrite)
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{
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u32 id;
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int cpu = event->cpu;
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cpumask_t *mask;
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struct coresight_device *sink;
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struct etm_event_data *event_data = NULL;
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event_data = alloc_event_data(cpu);
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if (!event_data)
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return NULL;
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INIT_WORK(&event_data->work, free_event_data);
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/* First get the selected sink from user space. */
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if (event->attr.config2) {
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id = (u32)event->attr.config2;
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sink = coresight_get_sink_by_id(id);
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} else {
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sink = coresight_get_enabled_sink(true);
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}
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if (!sink)
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goto err;
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mask = &event_data->mask;
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/*
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* Setup the path for each CPU in a trace session. We try to build
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* trace path for each CPU in the mask. If we don't find an ETM
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* for the CPU or fail to build a path, we clear the CPU from the
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* mask and continue with the rest. If ever we try to trace on those
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* CPUs, we can handle it and fail the session.
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*/
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for_each_cpu(cpu, mask) {
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struct list_head *path;
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struct coresight_device *csdev;
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csdev = per_cpu(csdev_src, cpu);
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/*
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* If there is no ETM associated with this CPU clear it from
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* the mask and continue with the rest. If ever we try to trace
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* on this CPU, we handle it accordingly.
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*/
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if (!csdev) {
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cpumask_clear_cpu(cpu, mask);
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continue;
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}
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/*
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* Building a path doesn't enable it, it simply builds a
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* list of devices from source to sink that can be
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* referenced later when the path is actually needed.
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*/
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path = coresight_build_path(csdev, sink);
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if (IS_ERR(path)) {
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cpumask_clear_cpu(cpu, mask);
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continue;
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}
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*etm_event_cpu_path_ptr(event_data, cpu) = path;
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}
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/* If we don't have any CPUs ready for tracing, abort */
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cpu = cpumask_first(mask);
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if (cpu >= nr_cpu_ids)
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goto err;
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if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
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goto err;
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/* Allocate the sink buffer for this session */
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event_data->snk_config =
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sink_ops(sink)->alloc_buffer(sink, event, pages,
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nr_pages, overwrite);
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if (!event_data->snk_config)
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goto err;
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out:
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return event_data;
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err:
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etm_free_aux(event_data);
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event_data = NULL;
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goto out;
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}
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static void etm_event_start(struct perf_event *event, int flags)
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{
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int cpu = smp_processor_id();
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struct etm_event_data *event_data;
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struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
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struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
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struct list_head *path;
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if (!csdev)
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goto fail;
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/*
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* Deal with the ring buffer API and get a handle on the
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* session's information.
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*/
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event_data = perf_aux_output_begin(handle, event);
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if (!event_data)
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goto fail;
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path = etm_event_cpu_path(event_data, cpu);
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/* We need a sink, no need to continue without one */
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sink = coresight_get_sink(path);
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if (WARN_ON_ONCE(!sink))
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goto fail_end_stop;
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/* Nothing will happen without a path */
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if (coresight_enable_path(path, CS_MODE_PERF, handle))
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goto fail_end_stop;
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/* Tell the perf core the event is alive */
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event->hw.state = 0;
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/* Finally enable the tracer */
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if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
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goto fail_disable_path;
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out:
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return;
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fail_disable_path:
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coresight_disable_path(path);
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fail_end_stop:
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perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
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perf_aux_output_end(handle, 0);
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fail:
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event->hw.state = PERF_HES_STOPPED;
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goto out;
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}
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static void etm_event_stop(struct perf_event *event, int mode)
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{
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int cpu = smp_processor_id();
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unsigned long size;
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struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
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struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
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struct etm_event_data *event_data = perf_get_aux(handle);
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struct list_head *path;
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if (event->hw.state == PERF_HES_STOPPED)
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return;
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if (!csdev)
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return;
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path = etm_event_cpu_path(event_data, cpu);
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if (!path)
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return;
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sink = coresight_get_sink(path);
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if (!sink)
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return;
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/* stop tracer */
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source_ops(csdev)->disable(csdev, event);
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/* tell the core */
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event->hw.state = PERF_HES_STOPPED;
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if (mode & PERF_EF_UPDATE) {
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if (WARN_ON_ONCE(handle->event != event))
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return;
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/* update trace information */
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if (!sink_ops(sink)->update_buffer)
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return;
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size = sink_ops(sink)->update_buffer(sink, handle,
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event_data->snk_config);
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perf_aux_output_end(handle, size);
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}
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/* Disabling the path make its elements available to other sessions */
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coresight_disable_path(path);
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}
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static int etm_event_add(struct perf_event *event, int mode)
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{
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int ret = 0;
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struct hw_perf_event *hwc = &event->hw;
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if (mode & PERF_EF_START) {
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etm_event_start(event, 0);
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if (hwc->state & PERF_HES_STOPPED)
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ret = -EINVAL;
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} else {
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hwc->state = PERF_HES_STOPPED;
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}
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return ret;
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}
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static void etm_event_del(struct perf_event *event, int mode)
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{
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etm_event_stop(event, PERF_EF_UPDATE);
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}
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static int etm_addr_filters_validate(struct list_head *filters)
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{
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bool range = false, address = false;
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int index = 0;
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struct perf_addr_filter *filter;
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list_for_each_entry(filter, filters, entry) {
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/*
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* No need to go further if there's no more
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* room for filters.
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*/
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if (++index > ETM_ADDR_CMP_MAX)
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return -EOPNOTSUPP;
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/* filter::size==0 means single address trigger */
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if (filter->size) {
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/*
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* The existing code relies on START/STOP filters
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* being address filters.
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*/
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if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
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filter->action == PERF_ADDR_FILTER_ACTION_STOP)
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return -EOPNOTSUPP;
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range = true;
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} else
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address = true;
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/*
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* At this time we don't allow range and start/stop filtering
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* to cohabitate, they have to be mutually exclusive.
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*/
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if (range && address)
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static void etm_addr_filters_sync(struct perf_event *event)
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{
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struct perf_addr_filters_head *head = perf_event_addr_filters(event);
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unsigned long start, stop;
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struct perf_addr_filter_range *fr = event->addr_filter_ranges;
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struct etm_filters *filters = event->hw.addr_filters;
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struct etm_filter *etm_filter;
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struct perf_addr_filter *filter;
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int i = 0;
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list_for_each_entry(filter, &head->list, entry) {
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start = fr[i].start;
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stop = start + fr[i].size;
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etm_filter = &filters->etm_filter[i];
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switch (filter->action) {
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case PERF_ADDR_FILTER_ACTION_FILTER:
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etm_filter->start_addr = start;
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etm_filter->stop_addr = stop;
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etm_filter->type = ETM_ADDR_TYPE_RANGE;
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break;
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case PERF_ADDR_FILTER_ACTION_START:
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etm_filter->start_addr = start;
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etm_filter->type = ETM_ADDR_TYPE_START;
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break;
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case PERF_ADDR_FILTER_ACTION_STOP:
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etm_filter->stop_addr = stop;
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etm_filter->type = ETM_ADDR_TYPE_STOP;
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break;
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}
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i++;
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}
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filters->nr_filters = i;
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}
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int etm_perf_symlink(struct coresight_device *csdev, bool link)
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{
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char entry[sizeof("cpu9999999")];
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int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
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struct device *pmu_dev = etm_pmu.dev;
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struct device *cs_dev = &csdev->dev;
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sprintf(entry, "cpu%d", cpu);
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if (!etm_perf_up)
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return -EPROBE_DEFER;
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if (link) {
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ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
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if (ret)
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return ret;
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per_cpu(csdev_src, cpu) = csdev;
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} else {
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sysfs_remove_link(&pmu_dev->kobj, entry);
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per_cpu(csdev_src, cpu) = NULL;
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}
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return 0;
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}
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static ssize_t etm_perf_sink_name_show(struct device *dev,
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struct device_attribute *dattr,
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char *buf)
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{
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struct dev_ext_attribute *ea;
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ea = container_of(dattr, struct dev_ext_attribute, attr);
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return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
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}
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int etm_perf_add_symlink_sink(struct coresight_device *csdev)
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{
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int ret;
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unsigned long hash;
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const char *name;
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struct device *pmu_dev = etm_pmu.dev;
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struct device *dev = &csdev->dev;
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struct dev_ext_attribute *ea;
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if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
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csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
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return -EINVAL;
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if (csdev->ea != NULL)
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return -EINVAL;
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if (!etm_perf_up)
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return -EPROBE_DEFER;
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ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
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if (!ea)
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return -ENOMEM;
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name = dev_name(dev);
|
|
/* See function coresight_get_sink_by_id() to know where this is used */
|
|
hash = hashlen_hash(hashlen_string(NULL, name));
|
|
|
|
sysfs_attr_init(&ea->attr.attr);
|
|
ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
|
|
if (!ea->attr.attr.name)
|
|
return -ENOMEM;
|
|
|
|
ea->attr.attr.mode = 0444;
|
|
ea->attr.show = etm_perf_sink_name_show;
|
|
ea->var = (unsigned long *)hash;
|
|
|
|
ret = sysfs_add_file_to_group(&pmu_dev->kobj,
|
|
&ea->attr.attr, "sinks");
|
|
|
|
if (!ret)
|
|
csdev->ea = ea;
|
|
|
|
return ret;
|
|
}
|
|
|
|
void etm_perf_del_symlink_sink(struct coresight_device *csdev)
|
|
{
|
|
struct device *pmu_dev = etm_pmu.dev;
|
|
struct dev_ext_attribute *ea = csdev->ea;
|
|
|
|
if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
|
|
csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
|
|
return;
|
|
|
|
if (!ea)
|
|
return;
|
|
|
|
sysfs_remove_file_from_group(&pmu_dev->kobj,
|
|
&ea->attr.attr, "sinks");
|
|
csdev->ea = NULL;
|
|
}
|
|
|
|
static int __init etm_perf_init(void)
|
|
{
|
|
int ret;
|
|
|
|
etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
|
|
PERF_PMU_CAP_ITRACE);
|
|
|
|
etm_pmu.attr_groups = etm_pmu_attr_groups;
|
|
etm_pmu.task_ctx_nr = perf_sw_context;
|
|
etm_pmu.read = etm_event_read;
|
|
etm_pmu.event_init = etm_event_init;
|
|
etm_pmu.setup_aux = etm_setup_aux;
|
|
etm_pmu.free_aux = etm_free_aux;
|
|
etm_pmu.start = etm_event_start;
|
|
etm_pmu.stop = etm_event_stop;
|
|
etm_pmu.add = etm_event_add;
|
|
etm_pmu.del = etm_event_del;
|
|
etm_pmu.addr_filters_sync = etm_addr_filters_sync;
|
|
etm_pmu.addr_filters_validate = etm_addr_filters_validate;
|
|
etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
|
|
|
|
ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
|
|
if (ret == 0)
|
|
etm_perf_up = true;
|
|
|
|
return ret;
|
|
}
|
|
device_initcall(etm_perf_init);
|