205 lines
4.6 KiB
C
205 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
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*
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* Authors:
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* Serge Semin <Sergey.Semin@baikalelectronics.ru>
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* Dmitry Dunaev <dmitry.dunaev@baikalelectronics.ru>
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*
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* Baikal-T1 CCU PLL clocks driver
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*/
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#define pr_fmt(fmt) "bt1-ccu-pll: " fmt
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#include <linux/kernel.h>
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#include <linux/printk.h>
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#include <linux/slab.h>
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#include <linux/clk-provider.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/ioport.h>
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#include <linux/regmap.h>
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#include <dt-bindings/clock/bt1-ccu.h>
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#include "ccu-pll.h"
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#define CCU_CPU_PLL_BASE 0x000
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#define CCU_SATA_PLL_BASE 0x008
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#define CCU_DDR_PLL_BASE 0x010
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#define CCU_PCIE_PLL_BASE 0x018
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#define CCU_ETH_PLL_BASE 0x020
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#define CCU_PLL_INFO(_id, _name, _pname, _base, _flags) \
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{ \
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.id = _id, \
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.name = _name, \
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.parent_name = _pname, \
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.base = _base, \
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.flags = _flags \
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}
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#define CCU_PLL_NUM ARRAY_SIZE(pll_info)
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struct ccu_pll_info {
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unsigned int id;
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const char *name;
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const char *parent_name;
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unsigned int base;
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unsigned long flags;
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};
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/*
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* Mark as critical all PLLs except Ethernet one. CPU and DDR PLLs are sources
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* of CPU cores and DDR controller reference clocks, due to which they
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* obviously shouldn't be ever gated. SATA and PCIe PLLs are the parents of
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* APB-bus and DDR controller AXI-bus clocks. If they are gated the system will
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* be unusable.
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*/
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static const struct ccu_pll_info pll_info[] = {
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CCU_PLL_INFO(CCU_CPU_PLL, "cpu_pll", "ref_clk", CCU_CPU_PLL_BASE,
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CLK_IS_CRITICAL),
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CCU_PLL_INFO(CCU_SATA_PLL, "sata_pll", "ref_clk", CCU_SATA_PLL_BASE,
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CLK_IS_CRITICAL | CLK_SET_RATE_GATE),
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CCU_PLL_INFO(CCU_DDR_PLL, "ddr_pll", "ref_clk", CCU_DDR_PLL_BASE,
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CLK_IS_CRITICAL | CLK_SET_RATE_GATE),
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CCU_PLL_INFO(CCU_PCIE_PLL, "pcie_pll", "ref_clk", CCU_PCIE_PLL_BASE,
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CLK_IS_CRITICAL),
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CCU_PLL_INFO(CCU_ETH_PLL, "eth_pll", "ref_clk", CCU_ETH_PLL_BASE,
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CLK_SET_RATE_GATE)
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};
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struct ccu_pll_data {
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struct device_node *np;
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struct regmap *sys_regs;
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struct ccu_pll *plls[CCU_PLL_NUM];
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};
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static struct ccu_pll *ccu_pll_find_desc(struct ccu_pll_data *data,
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unsigned int clk_id)
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{
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struct ccu_pll *pll;
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int idx;
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for (idx = 0; idx < CCU_PLL_NUM; ++idx) {
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pll = data->plls[idx];
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if (pll && pll->id == clk_id)
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return pll;
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}
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return ERR_PTR(-EINVAL);
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}
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static struct ccu_pll_data *ccu_pll_create_data(struct device_node *np)
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{
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struct ccu_pll_data *data;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return ERR_PTR(-ENOMEM);
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data->np = np;
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return data;
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}
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static void ccu_pll_free_data(struct ccu_pll_data *data)
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{
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kfree(data);
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}
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static int ccu_pll_find_sys_regs(struct ccu_pll_data *data)
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{
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data->sys_regs = syscon_node_to_regmap(data->np->parent);
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if (IS_ERR(data->sys_regs)) {
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pr_err("Failed to find syscon regs for '%s'\n",
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of_node_full_name(data->np));
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return PTR_ERR(data->sys_regs);
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}
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return 0;
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}
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static struct clk_hw *ccu_pll_of_clk_hw_get(struct of_phandle_args *clkspec,
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void *priv)
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{
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struct ccu_pll_data *data = priv;
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struct ccu_pll *pll;
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unsigned int clk_id;
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clk_id = clkspec->args[0];
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pll = ccu_pll_find_desc(data, clk_id);
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if (IS_ERR(pll)) {
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pr_info("Invalid PLL clock ID %d specified\n", clk_id);
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return ERR_CAST(pll);
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}
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return ccu_pll_get_clk_hw(pll);
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}
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static int ccu_pll_clk_register(struct ccu_pll_data *data)
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{
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int idx, ret;
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for (idx = 0; idx < CCU_PLL_NUM; ++idx) {
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const struct ccu_pll_info *info = &pll_info[idx];
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struct ccu_pll_init_data init = {0};
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init.id = info->id;
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init.name = info->name;
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init.parent_name = info->parent_name;
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init.base = info->base;
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init.sys_regs = data->sys_regs;
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init.np = data->np;
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init.flags = info->flags;
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data->plls[idx] = ccu_pll_hw_register(&init);
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if (IS_ERR(data->plls[idx])) {
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ret = PTR_ERR(data->plls[idx]);
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pr_err("Couldn't register PLL hw '%s'\n",
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init.name);
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goto err_hw_unregister;
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}
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}
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ret = of_clk_add_hw_provider(data->np, ccu_pll_of_clk_hw_get, data);
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if (ret) {
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pr_err("Couldn't register PLL provider of '%s'\n",
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of_node_full_name(data->np));
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goto err_hw_unregister;
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}
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return 0;
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err_hw_unregister:
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for (--idx; idx >= 0; --idx)
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ccu_pll_hw_unregister(data->plls[idx]);
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return ret;
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}
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static __init void ccu_pll_init(struct device_node *np)
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{
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struct ccu_pll_data *data;
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int ret;
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data = ccu_pll_create_data(np);
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if (IS_ERR(data))
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return;
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ret = ccu_pll_find_sys_regs(data);
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if (ret)
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goto err_free_data;
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ret = ccu_pll_clk_register(data);
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if (ret)
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goto err_free_data;
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return;
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err_free_data:
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ccu_pll_free_data(data);
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}
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CLK_OF_DECLARE(ccu_pll, "baikal,bt1-ccu-pll", ccu_pll_init);
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