- Add new LBR format v7 support which is v5 modulo TSX
- Fix counter enumeration on Alder Lake hybrids
- Overhaul how context time updates are done and get rid of
perf_event::shadow_ctx_time.
- The usual amount of fixes: event mask correction, supported event
types reporting, etc.
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Merge tag 'perf_urgent_for_v5.17_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Borislav Petkov:
- Add support for accessing the general purpose counters on Alder Lake
via MMIO
- Add new LBR format v7 support which is v5 modulo TSX
- Fix counter enumeration on Alder Lake hybrids
- Overhaul how context time updates are done and get rid of
perf_event::shadow_ctx_time.
- The usual amount of fixes: event mask correction, supported event
types reporting, etc.
* tag 'perf_urgent_for_v5.17_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/perf: Avoid warning for Arch LBR without XSAVE
perf/x86/intel/uncore: Add IMC uncore support for ADL
perf/x86/intel/lbr: Add static_branch for LBR INFO flags
perf/x86/intel/lbr: Support LBR format V7
perf/x86/rapl: fix AMD event handling
perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX
perf/x86/intel: Add a quirk for the calculation of the number of counters on Alder Lake
perf: Fix perf_event_read_local() time