611 lines
16 KiB
C
611 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Ampere Computing SoC's SMpro Error Monitoring Driver
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*
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* Copyright (c) 2022, Ampere Computing LLC
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*
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*/
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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/* GPI RAS Error Registers */
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#define GPI_RAS_ERR 0x7E
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/* Core and L2C Error Registers */
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#define CORE_CE_ERR_CNT 0x80
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#define CORE_CE_ERR_LEN 0x81
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#define CORE_CE_ERR_DATA 0x82
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#define CORE_UE_ERR_CNT 0x83
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#define CORE_UE_ERR_LEN 0x84
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#define CORE_UE_ERR_DATA 0x85
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/* Memory Error Registers */
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#define MEM_CE_ERR_CNT 0x90
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#define MEM_CE_ERR_LEN 0x91
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#define MEM_CE_ERR_DATA 0x92
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#define MEM_UE_ERR_CNT 0x93
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#define MEM_UE_ERR_LEN 0x94
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#define MEM_UE_ERR_DATA 0x95
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/* RAS Error/Warning Registers */
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#define ERR_SMPRO_TYPE 0xA0
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#define ERR_PMPRO_TYPE 0xA1
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#define ERR_SMPRO_INFO_LO 0xA2
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#define ERR_SMPRO_INFO_HI 0xA3
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#define ERR_SMPRO_DATA_LO 0xA4
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#define ERR_SMPRO_DATA_HI 0xA5
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#define WARN_SMPRO_INFO_LO 0xAA
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#define WARN_SMPRO_INFO_HI 0xAB
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#define ERR_PMPRO_INFO_LO 0xA6
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#define ERR_PMPRO_INFO_HI 0xA7
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#define ERR_PMPRO_DATA_LO 0xA8
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#define ERR_PMPRO_DATA_HI 0xA9
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#define WARN_PMPRO_INFO_LO 0xAC
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#define WARN_PMPRO_INFO_HI 0xAD
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/* Boot Stage Register */
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#define BOOTSTAGE 0xB0
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#define DIMM_SYNDROME_SEL 0xB4
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#define DIMM_SYNDROME_ERR 0xB5
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#define DIMM_SYNDROME_STAGE 4
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/* PCIE Error Registers */
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#define PCIE_CE_ERR_CNT 0xC0
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#define PCIE_CE_ERR_LEN 0xC1
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#define PCIE_CE_ERR_DATA 0xC2
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#define PCIE_UE_ERR_CNT 0xC3
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#define PCIE_UE_ERR_LEN 0xC4
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#define PCIE_UE_ERR_DATA 0xC5
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/* Other Error Registers */
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#define OTHER_CE_ERR_CNT 0xD0
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#define OTHER_CE_ERR_LEN 0xD1
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#define OTHER_CE_ERR_DATA 0xD2
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#define OTHER_UE_ERR_CNT 0xD8
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#define OTHER_UE_ERR_LEN 0xD9
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#define OTHER_UE_ERR_DATA 0xDA
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/* Event Data Registers */
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#define VRD_WARN_FAULT_EVENT_DATA 0x78
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#define VRD_HOT_EVENT_DATA 0x79
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#define DIMM_HOT_EVENT_DATA 0x7A
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#define DIMM_2X_REFRESH_EVENT_DATA 0x96
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#define MAX_READ_BLOCK_LENGTH 48
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#define RAS_SMPRO_ERR 0
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#define RAS_PMPRO_ERR 1
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enum RAS_48BYTES_ERR_TYPES {
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CORE_CE_ERR,
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CORE_UE_ERR,
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MEM_CE_ERR,
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MEM_UE_ERR,
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PCIE_CE_ERR,
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PCIE_UE_ERR,
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OTHER_CE_ERR,
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OTHER_UE_ERR,
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NUM_48BYTES_ERR_TYPE,
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};
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struct smpro_error_hdr {
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u8 count; /* Number of the RAS errors */
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u8 len; /* Number of data bytes */
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u8 data; /* Start of 48-byte data */
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u8 max_cnt; /* Max num of errors */
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};
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/*
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* Included Address of registers to get Count, Length of data and Data
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* of the 48 bytes error data
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*/
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static struct smpro_error_hdr smpro_error_table[] = {
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[CORE_CE_ERR] = {
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.count = CORE_CE_ERR_CNT,
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.len = CORE_CE_ERR_LEN,
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.data = CORE_CE_ERR_DATA,
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.max_cnt = 32
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},
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[CORE_UE_ERR] = {
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.count = CORE_UE_ERR_CNT,
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.len = CORE_UE_ERR_LEN,
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.data = CORE_UE_ERR_DATA,
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.max_cnt = 32
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},
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[MEM_CE_ERR] = {
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.count = MEM_CE_ERR_CNT,
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.len = MEM_CE_ERR_LEN,
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.data = MEM_CE_ERR_DATA,
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.max_cnt = 16
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},
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[MEM_UE_ERR] = {
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.count = MEM_UE_ERR_CNT,
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.len = MEM_UE_ERR_LEN,
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.data = MEM_UE_ERR_DATA,
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.max_cnt = 16
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},
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[PCIE_CE_ERR] = {
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.count = PCIE_CE_ERR_CNT,
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.len = PCIE_CE_ERR_LEN,
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.data = PCIE_CE_ERR_DATA,
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.max_cnt = 96
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},
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[PCIE_UE_ERR] = {
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.count = PCIE_UE_ERR_CNT,
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.len = PCIE_UE_ERR_LEN,
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.data = PCIE_UE_ERR_DATA,
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.max_cnt = 96
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},
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[OTHER_CE_ERR] = {
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.count = OTHER_CE_ERR_CNT,
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.len = OTHER_CE_ERR_LEN,
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.data = OTHER_CE_ERR_DATA,
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.max_cnt = 8
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},
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[OTHER_UE_ERR] = {
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.count = OTHER_UE_ERR_CNT,
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.len = OTHER_UE_ERR_LEN,
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.data = OTHER_UE_ERR_DATA,
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.max_cnt = 8
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},
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};
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/*
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* List of SCP registers which are used to get
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* one type of RAS Internal errors.
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*/
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struct smpro_int_error_hdr {
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u8 type;
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u8 info_l;
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u8 info_h;
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u8 data_l;
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u8 data_h;
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u8 warn_l;
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u8 warn_h;
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};
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static struct smpro_int_error_hdr list_smpro_int_error_hdr[] = {
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[RAS_SMPRO_ERR] = {
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.type = ERR_SMPRO_TYPE,
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.info_l = ERR_SMPRO_INFO_LO,
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.info_h = ERR_SMPRO_INFO_HI,
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.data_l = ERR_SMPRO_DATA_LO,
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.data_h = ERR_SMPRO_DATA_HI,
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.warn_l = WARN_SMPRO_INFO_LO,
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.warn_h = WARN_SMPRO_INFO_HI,
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},
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[RAS_PMPRO_ERR] = {
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.type = ERR_PMPRO_TYPE,
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.info_l = ERR_PMPRO_INFO_LO,
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.info_h = ERR_PMPRO_INFO_HI,
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.data_l = ERR_PMPRO_DATA_LO,
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.data_h = ERR_PMPRO_DATA_HI,
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.warn_l = WARN_PMPRO_INFO_LO,
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.warn_h = WARN_PMPRO_INFO_HI,
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},
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};
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struct smpro_errmon {
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struct regmap *regmap;
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};
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enum EVENT_TYPES {
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VRD_WARN_FAULT_EVENT,
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VRD_HOT_EVENT,
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DIMM_HOT_EVENT,
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DIMM_2X_REFRESH_EVENT,
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NUM_EVENTS_TYPE,
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};
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/* Included Address of event source and data registers */
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static u8 smpro_event_table[NUM_EVENTS_TYPE] = {
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VRD_WARN_FAULT_EVENT_DATA,
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VRD_HOT_EVENT_DATA,
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DIMM_HOT_EVENT_DATA,
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DIMM_2X_REFRESH_EVENT_DATA,
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};
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static ssize_t smpro_event_data_read(struct device *dev,
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struct device_attribute *da, char *buf,
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int channel)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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s32 event_data;
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int ret;
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ret = regmap_read(errmon->regmap, smpro_event_table[channel], &event_data);
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if (ret)
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return ret;
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/* Clear event after read */
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if (event_data != 0)
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regmap_write(errmon->regmap, smpro_event_table[channel], event_data);
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return sysfs_emit(buf, "%04x\n", event_data);
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}
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static ssize_t smpro_overflow_data_read(struct device *dev, struct device_attribute *da,
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char *buf, int channel)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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struct smpro_error_hdr *err_info;
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s32 err_count;
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int ret;
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err_info = &smpro_error_table[channel];
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ret = regmap_read(errmon->regmap, err_info->count, &err_count);
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if (ret)
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return ret;
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/* Bit 8 indicates the overflow status */
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return sysfs_emit(buf, "%d\n", (err_count & BIT(8)) ? 1 : 0);
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}
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static ssize_t smpro_error_data_read(struct device *dev, struct device_attribute *da,
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char *buf, int channel)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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unsigned char err_data[MAX_READ_BLOCK_LENGTH];
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struct smpro_error_hdr *err_info;
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s32 err_count, err_length;
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int ret;
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err_info = &smpro_error_table[channel];
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ret = regmap_read(errmon->regmap, err_info->count, &err_count);
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/* Error count is the low byte */
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err_count &= 0xff;
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if (ret || !err_count || err_count > err_info->max_cnt)
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return ret;
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ret = regmap_read(errmon->regmap, err_info->len, &err_length);
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if (ret || err_length <= 0)
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return ret;
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if (err_length > MAX_READ_BLOCK_LENGTH)
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err_length = MAX_READ_BLOCK_LENGTH;
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memset(err_data, 0x00, MAX_READ_BLOCK_LENGTH);
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ret = regmap_noinc_read(errmon->regmap, err_info->data, err_data, err_length);
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if (ret < 0)
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return ret;
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/* clear the error */
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ret = regmap_write(errmon->regmap, err_info->count, 0x100);
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if (ret)
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return ret;
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/*
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* The output of Core/Memory/PCIe/Others UE/CE errors follows the format
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* specified in section 5.8.1 CE/UE Error Data record in
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* Altra SOC BMC Interface specification.
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*/
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return sysfs_emit(buf, "%*phN\n", MAX_READ_BLOCK_LENGTH, err_data);
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}
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/*
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* Output format:
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* <4-byte hex value of error info><4-byte hex value of error extensive data>
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* Where:
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* + error info : The error information
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* + error data : Extensive data (32 bits)
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* Reference to section 5.10 RAS Internal Error Register Definition in
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* Altra SOC BMC Interface specification
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*/
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static ssize_t smpro_internal_err_read(struct device *dev, struct device_attribute *da,
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char *buf, int channel)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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struct smpro_int_error_hdr *err_info;
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unsigned int err[4] = { 0 };
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unsigned int err_type;
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unsigned int val;
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int ret;
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/* read error status */
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ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &val);
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if (ret)
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return ret;
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if ((channel == RAS_SMPRO_ERR && !(val & BIT(0))) ||
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(channel == RAS_PMPRO_ERR && !(val & BIT(1))))
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return 0;
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err_info = &list_smpro_int_error_hdr[channel];
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ret = regmap_read(errmon->regmap, err_info->type, &val);
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if (ret)
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return ret;
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err_type = (val & BIT(1)) ? BIT(1) :
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(val & BIT(2)) ? BIT(2) : 0;
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if (!err_type)
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return 0;
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ret = regmap_read(errmon->regmap, err_info->info_l, err + 1);
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if (ret)
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return ret;
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ret = regmap_read(errmon->regmap, err_info->info_h, err);
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if (ret)
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return ret;
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if (err_type & BIT(2)) {
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/* Error with data type */
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ret = regmap_read(errmon->regmap, err_info->data_l, err + 3);
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if (ret)
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return ret;
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ret = regmap_read(errmon->regmap, err_info->data_h, err + 2);
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if (ret)
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return ret;
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}
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/* clear the read errors */
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ret = regmap_write(errmon->regmap, err_info->type, err_type);
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if (ret)
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return ret;
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return sysfs_emit(buf, "%*phN\n", (int)sizeof(err), err);
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}
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/*
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* Output format:
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* <4-byte hex value of warining info>
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* Reference to section 5.10 RAS Internal Error Register Definition in
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* Altra SOC BMC Interface specification
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*/
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static ssize_t smpro_internal_warn_read(struct device *dev, struct device_attribute *da,
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char *buf, int channel)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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struct smpro_int_error_hdr *err_info;
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unsigned int warn[2] = { 0 };
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unsigned int val;
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int ret;
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/* read error status */
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ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &val);
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if (ret)
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return ret;
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if ((channel == RAS_SMPRO_ERR && !(val & BIT(0))) ||
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(channel == RAS_PMPRO_ERR && !(val & BIT(1))))
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return 0;
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err_info = &list_smpro_int_error_hdr[channel];
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ret = regmap_read(errmon->regmap, err_info->type, &val);
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if (ret)
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return ret;
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if (!(val & BIT(0)))
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return 0;
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ret = regmap_read(errmon->regmap, err_info->warn_l, warn + 1);
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if (ret)
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return ret;
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ret = regmap_read(errmon->regmap, err_info->warn_h, warn);
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if (ret)
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return ret;
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/* clear the warning */
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ret = regmap_write(errmon->regmap, err_info->type, BIT(0));
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if (ret)
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return ret;
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return sysfs_emit(buf, "%*phN\n", (int)sizeof(warn), warn);
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}
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#define ERROR_OVERFLOW_RO(_error, _index) \
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static ssize_t overflow_##_error##_show(struct device *dev, \
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struct device_attribute *da, \
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char *buf) \
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{ \
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return smpro_overflow_data_read(dev, da, buf, _index); \
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} \
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static DEVICE_ATTR_RO(overflow_##_error)
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ERROR_OVERFLOW_RO(core_ce, CORE_CE_ERR);
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ERROR_OVERFLOW_RO(core_ue, CORE_UE_ERR);
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ERROR_OVERFLOW_RO(mem_ce, MEM_CE_ERR);
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ERROR_OVERFLOW_RO(mem_ue, MEM_UE_ERR);
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ERROR_OVERFLOW_RO(pcie_ce, PCIE_CE_ERR);
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ERROR_OVERFLOW_RO(pcie_ue, PCIE_UE_ERR);
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ERROR_OVERFLOW_RO(other_ce, OTHER_CE_ERR);
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ERROR_OVERFLOW_RO(other_ue, OTHER_UE_ERR);
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#define ERROR_RO(_error, _index) \
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static ssize_t error_##_error##_show(struct device *dev, \
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struct device_attribute *da, \
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char *buf) \
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{ \
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return smpro_error_data_read(dev, da, buf, _index); \
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} \
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static DEVICE_ATTR_RO(error_##_error)
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ERROR_RO(core_ce, CORE_CE_ERR);
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ERROR_RO(core_ue, CORE_UE_ERR);
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ERROR_RO(mem_ce, MEM_CE_ERR);
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ERROR_RO(mem_ue, MEM_UE_ERR);
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ERROR_RO(pcie_ce, PCIE_CE_ERR);
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ERROR_RO(pcie_ue, PCIE_UE_ERR);
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ERROR_RO(other_ce, OTHER_CE_ERR);
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ERROR_RO(other_ue, OTHER_UE_ERR);
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static ssize_t error_smpro_show(struct device *dev, struct device_attribute *da, char *buf)
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{
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return smpro_internal_err_read(dev, da, buf, RAS_SMPRO_ERR);
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}
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static DEVICE_ATTR_RO(error_smpro);
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static ssize_t error_pmpro_show(struct device *dev, struct device_attribute *da, char *buf)
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{
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return smpro_internal_err_read(dev, da, buf, RAS_PMPRO_ERR);
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}
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static DEVICE_ATTR_RO(error_pmpro);
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static ssize_t warn_smpro_show(struct device *dev, struct device_attribute *da, char *buf)
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{
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return smpro_internal_warn_read(dev, da, buf, RAS_SMPRO_ERR);
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}
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static DEVICE_ATTR_RO(warn_smpro);
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static ssize_t warn_pmpro_show(struct device *dev, struct device_attribute *da, char *buf)
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{
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return smpro_internal_warn_read(dev, da, buf, RAS_PMPRO_ERR);
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}
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static DEVICE_ATTR_RO(warn_pmpro);
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#define EVENT_RO(_event, _index) \
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static ssize_t event_##_event##_show(struct device *dev, \
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struct device_attribute *da, \
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char *buf) \
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{ \
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return smpro_event_data_read(dev, da, buf, _index); \
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} \
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static DEVICE_ATTR_RO(event_##_event)
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EVENT_RO(vrd_warn_fault, VRD_WARN_FAULT_EVENT);
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EVENT_RO(vrd_hot, VRD_HOT_EVENT);
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EVENT_RO(dimm_hot, DIMM_HOT_EVENT);
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EVENT_RO(dimm_2x_refresh, DIMM_2X_REFRESH_EVENT);
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static ssize_t smpro_dimm_syndrome_read(struct device *dev, struct device_attribute *da,
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char *buf, unsigned int slot)
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{
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struct smpro_errmon *errmon = dev_get_drvdata(dev);
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unsigned int data;
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int ret;
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ret = regmap_read(errmon->regmap, BOOTSTAGE, &data);
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if (ret)
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return ret;
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/* check for valid stage */
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data = (data >> 8) & 0xff;
|
|
if (data != DIMM_SYNDROME_STAGE)
|
|
return ret;
|
|
|
|
/* Write the slot ID to retrieve Error Syndrome */
|
|
ret = regmap_write(errmon->regmap, DIMM_SYNDROME_SEL, slot);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Read the Syndrome error */
|
|
ret = regmap_read(errmon->regmap, DIMM_SYNDROME_ERR, &data);
|
|
if (ret || !data)
|
|
return ret;
|
|
|
|
return sysfs_emit(buf, "%04x\n", data);
|
|
}
|
|
|
|
#define EVENT_DIMM_SYNDROME(_slot) \
|
|
static ssize_t event_dimm##_slot##_syndrome_show(struct device *dev, \
|
|
struct device_attribute *da, \
|
|
char *buf) \
|
|
{ \
|
|
return smpro_dimm_syndrome_read(dev, da, buf, _slot); \
|
|
} \
|
|
static DEVICE_ATTR_RO(event_dimm##_slot##_syndrome)
|
|
|
|
EVENT_DIMM_SYNDROME(0);
|
|
EVENT_DIMM_SYNDROME(1);
|
|
EVENT_DIMM_SYNDROME(2);
|
|
EVENT_DIMM_SYNDROME(3);
|
|
EVENT_DIMM_SYNDROME(4);
|
|
EVENT_DIMM_SYNDROME(5);
|
|
EVENT_DIMM_SYNDROME(6);
|
|
EVENT_DIMM_SYNDROME(7);
|
|
EVENT_DIMM_SYNDROME(8);
|
|
EVENT_DIMM_SYNDROME(9);
|
|
EVENT_DIMM_SYNDROME(10);
|
|
EVENT_DIMM_SYNDROME(11);
|
|
EVENT_DIMM_SYNDROME(12);
|
|
EVENT_DIMM_SYNDROME(13);
|
|
EVENT_DIMM_SYNDROME(14);
|
|
EVENT_DIMM_SYNDROME(15);
|
|
|
|
static struct attribute *smpro_errmon_attrs[] = {
|
|
&dev_attr_overflow_core_ce.attr,
|
|
&dev_attr_overflow_core_ue.attr,
|
|
&dev_attr_overflow_mem_ce.attr,
|
|
&dev_attr_overflow_mem_ue.attr,
|
|
&dev_attr_overflow_pcie_ce.attr,
|
|
&dev_attr_overflow_pcie_ue.attr,
|
|
&dev_attr_overflow_other_ce.attr,
|
|
&dev_attr_overflow_other_ue.attr,
|
|
&dev_attr_error_core_ce.attr,
|
|
&dev_attr_error_core_ue.attr,
|
|
&dev_attr_error_mem_ce.attr,
|
|
&dev_attr_error_mem_ue.attr,
|
|
&dev_attr_error_pcie_ce.attr,
|
|
&dev_attr_error_pcie_ue.attr,
|
|
&dev_attr_error_other_ce.attr,
|
|
&dev_attr_error_other_ue.attr,
|
|
&dev_attr_error_smpro.attr,
|
|
&dev_attr_error_pmpro.attr,
|
|
&dev_attr_warn_smpro.attr,
|
|
&dev_attr_warn_pmpro.attr,
|
|
&dev_attr_event_vrd_warn_fault.attr,
|
|
&dev_attr_event_vrd_hot.attr,
|
|
&dev_attr_event_dimm_hot.attr,
|
|
&dev_attr_event_dimm_2x_refresh.attr,
|
|
&dev_attr_event_dimm0_syndrome.attr,
|
|
&dev_attr_event_dimm1_syndrome.attr,
|
|
&dev_attr_event_dimm2_syndrome.attr,
|
|
&dev_attr_event_dimm3_syndrome.attr,
|
|
&dev_attr_event_dimm4_syndrome.attr,
|
|
&dev_attr_event_dimm5_syndrome.attr,
|
|
&dev_attr_event_dimm6_syndrome.attr,
|
|
&dev_attr_event_dimm7_syndrome.attr,
|
|
&dev_attr_event_dimm8_syndrome.attr,
|
|
&dev_attr_event_dimm9_syndrome.attr,
|
|
&dev_attr_event_dimm10_syndrome.attr,
|
|
&dev_attr_event_dimm11_syndrome.attr,
|
|
&dev_attr_event_dimm12_syndrome.attr,
|
|
&dev_attr_event_dimm13_syndrome.attr,
|
|
&dev_attr_event_dimm14_syndrome.attr,
|
|
&dev_attr_event_dimm15_syndrome.attr,
|
|
NULL
|
|
};
|
|
|
|
ATTRIBUTE_GROUPS(smpro_errmon);
|
|
|
|
static int smpro_errmon_probe(struct platform_device *pdev)
|
|
{
|
|
struct smpro_errmon *errmon;
|
|
|
|
errmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_errmon), GFP_KERNEL);
|
|
if (!errmon)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, errmon);
|
|
|
|
errmon->regmap = dev_get_regmap(pdev->dev.parent, NULL);
|
|
if (!errmon->regmap)
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver smpro_errmon_driver = {
|
|
.probe = smpro_errmon_probe,
|
|
.driver = {
|
|
.name = "smpro-errmon",
|
|
.dev_groups = smpro_errmon_groups,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(smpro_errmon_driver);
|
|
|
|
MODULE_AUTHOR("Tung Nguyen <tung.nguyen@amperecomputing.com>");
|
|
MODULE_AUTHOR("Thinh Pham <thinh.pham@amperecomputing.com>");
|
|
MODULE_AUTHOR("Hoang Nguyen <hnguyen@amperecomputing.com>");
|
|
MODULE_AUTHOR("Thu Nguyen <thu@os.amperecomputing.com>");
|
|
MODULE_AUTHOR("Quan Nguyen <quan@os.amperecomputing.com>");
|
|
MODULE_DESCRIPTION("Ampere Altra SMpro driver");
|
|
MODULE_LICENSE("GPL");
|