Liao Chang a0caebbd04 arm64/kprobe: Optimize the performance of patching single-step slot ... Single-step slot would not be used until kprobe is enabled, that means no race condition occurs on it under SMP, hence it is safe to pacth ss slot without stopping machine. Since I and D caches are coherent within single-step slot from aarch64_insn_patch_text_nosync(), hence no need to do it again via flush_icache_range(). Acked-by: Will Deacon <will@kernel.org> Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Liao Chang <liaochang1@huawei.com> Link: https://lore.kernel.org/r/20220927022435.129965-4-liaochang1@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2022-09-30 09:17:15 +01:00
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Makefile	…
decode-insn.c	arm64: kprobe: clarify the comment of steppable hint instructions	2020-09-14 12:07:03 +01:00
decode-insn.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
kprobes.c	arm64/kprobe: Optimize the performance of patching single-step slot	2022-09-30 09:17:15 +01:00
kprobes_trampoline.S	arm64: kprobes: Make a frame pointer on __kretprobe_trampoline	2021-10-22 12:16:53 -04:00
simulate-insn.c	arm64: Move aarch32 condition check functions	2021-05-27 17:38:07 +01:00
simulate-insn.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
uprobes.c	arm64: Treat ESR_ELx as a 64-bit register	2022-04-29 19:26:27 +01:00