OpenCloudOS-Kernel/drivers/gpu/drm/msm/dsi
Hai Li fae11c1106 drm/msm/dsi: Specify bitmask to set source PLL
The bit position to configure source PLL will change
on new types of PHYs. The caller should pass down
this information.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:27 -04:00
..
pll drm/msm/dsi: Save/Restore PLL status across PHY reset 2015-08-15 18:27:18 -04:00
dsi.c drm/msm/dsi: Allow dsi to connect to an external bridge 2015-08-15 18:27:25 -04:00
dsi.h drm/msm/dsi: Allow dsi to connect to an external bridge 2015-08-15 18:27:25 -04:00
dsi.xml.h drm/msm: update generated headers 2015-08-15 18:27:10 -04:00
dsi_host.c drm/msm/dsi: Allow dsi to connect to an external bridge 2015-08-15 18:27:25 -04:00
dsi_manager.c drm/msm/dsi: Modify dsi manager bridge ops to work with external bridges 2015-08-15 18:27:26 -04:00
dsi_phy.c drm/msm/dsi: Specify bitmask to set source PLL 2015-08-15 18:27:27 -04:00
mmss_cc.xml.h drm/msm: update generated headers 2015-08-15 18:27:10 -04:00
sfpb.xml.h drm/msm: update generated headers 2015-08-15 18:27:10 -04:00