35 lines
1.1 KiB
C
35 lines
1.1 KiB
C
#ifndef AGP_H
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#define AGP_H 1
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#include <asm/pgtable.h>
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#include <asm/cacheflush.h>
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/*
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* Functions to keep the agpgart mappings coherent with the MMU.
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* The GART gives the CPU a physical alias of pages in memory. The alias region is
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* mapped uncacheable. Make sure there are no conflicting mappings
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* with different cachability attributes for the same page. This avoids
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* data corruption on some CPUs.
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*/
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int map_page_into_agp(struct page *page);
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int unmap_page_from_agp(struct page *page);
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#define flush_agp_mappings() global_flush_tlb()
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/* Could use CLFLUSH here if the cpu supports it. But then it would
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need to be called for each cacheline of the whole page so it may not be
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worth it. Would need a page for it. */
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#define flush_agp_cache() wbinvd()
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/* Convert a physical address to an address suitable for the GART. */
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#define phys_to_gart(x) (x)
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#define gart_to_phys(x) (x)
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/* GATT allocation. Returns/accepts GATT kernel virtual address. */
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#define alloc_gatt_pages(order) \
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((char *)__get_free_pages(GFP_KERNEL, (order)))
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#define free_gatt_pages(table, order) \
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free_pages((unsigned long)(table), (order))
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#endif
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