595 lines
15 KiB
C
595 lines
15 KiB
C
/*
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* sp5100_tco : TCO timer driver for sp5100 chipsets
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*
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* (c) Copyright 2009 Google Inc., All Rights Reserved.
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*
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* Based on i8xx_tco.c:
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* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
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* Reserved.
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* http://www.kernelconcepts.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide",
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* AMD Publication 45482 "AMD SB800-Series Southbridges Register
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* Reference Guide"
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include "sp5100_tco.h"
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/* Module and version information */
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#define TCO_VERSION "0.05"
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#define TCO_MODULE_NAME "SP5100 TCO timer"
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#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
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/* internal variables */
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static u32 tcobase_phys;
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static u32 tco_wdt_fired;
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static void __iomem *tcobase;
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static unsigned int pm_iobase;
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static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */
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static unsigned long timer_alive;
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static char tco_expect_close;
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static struct pci_dev *sp5100_tco_pci;
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/* the watchdog platform device */
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static struct platform_device *sp5100_tco_platform_device;
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/* module parameters */
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#define WATCHDOG_HEARTBEAT 60 /* 60 sec default heartbeat. */
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static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
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__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
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" (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/*
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* Some TCO specific functions
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*/
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static bool tco_has_sp5100_reg_layout(struct pci_dev *dev)
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{
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return dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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dev->revision < 0x40;
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}
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static void tco_timer_start(void)
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{
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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val = readl(SP5100_WDT_CONTROL(tcobase));
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val |= SP5100_WDT_START_STOP_BIT;
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writel(val, SP5100_WDT_CONTROL(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static void tco_timer_stop(void)
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{
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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val = readl(SP5100_WDT_CONTROL(tcobase));
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val &= ~SP5100_WDT_START_STOP_BIT;
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writel(val, SP5100_WDT_CONTROL(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static void tco_timer_keepalive(void)
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{
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&tco_lock, flags);
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val = readl(SP5100_WDT_CONTROL(tcobase));
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val |= SP5100_WDT_TRIGGER_BIT;
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writel(val, SP5100_WDT_CONTROL(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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}
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static int tco_timer_set_heartbeat(int t)
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{
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unsigned long flags;
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if (t < 0 || t > 0xffff)
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return -EINVAL;
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/* Write new heartbeat to watchdog */
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spin_lock_irqsave(&tco_lock, flags);
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writel(t, SP5100_WDT_COUNT(tcobase));
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spin_unlock_irqrestore(&tco_lock, flags);
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heartbeat = t;
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return 0;
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}
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static void tco_timer_enable(void)
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{
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int val;
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if (!tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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/* For SB800 or later */
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/* Set the Watchdog timer resolution to 1 sec */
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outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG);
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val = inb(SB800_IO_PM_DATA_REG);
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val |= SB800_PM_WATCHDOG_SECOND_RES;
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outb(val, SB800_IO_PM_DATA_REG);
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/* Enable watchdog decode bit and watchdog timer */
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outb(SB800_PM_WATCHDOG_CONTROL, SB800_IO_PM_INDEX_REG);
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val = inb(SB800_IO_PM_DATA_REG);
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val |= SB800_PCI_WATCHDOG_DECODE_EN;
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val &= ~SB800_PM_WATCHDOG_DISABLE;
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outb(val, SB800_IO_PM_DATA_REG);
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} else {
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/* For SP5100 or SB7x0 */
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/* Enable watchdog decode bit */
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pci_read_config_dword(sp5100_tco_pci,
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SP5100_PCI_WATCHDOG_MISC_REG,
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&val);
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val |= SP5100_PCI_WATCHDOG_DECODE_EN;
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pci_write_config_dword(sp5100_tco_pci,
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SP5100_PCI_WATCHDOG_MISC_REG,
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val);
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/* Enable Watchdog timer and set the resolution to 1 sec */
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outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG);
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val = inb(SP5100_IO_PM_DATA_REG);
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val |= SP5100_PM_WATCHDOG_SECOND_RES;
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val &= ~SP5100_PM_WATCHDOG_DISABLE;
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outb(val, SP5100_IO_PM_DATA_REG);
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}
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}
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/*
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* /dev/watchdog handling
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*/
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static int sp5100_tco_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &timer_alive))
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return -EBUSY;
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/* Reload and activate timer */
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tco_timer_start();
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tco_timer_keepalive();
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return nonseekable_open(inode, file);
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}
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static int sp5100_tco_release(struct inode *inode, struct file *file)
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{
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/* Shut off the timer. */
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if (tco_expect_close == 42) {
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tco_timer_stop();
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} else {
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pr_crit("Unexpected close, not stopping watchdog!\n");
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tco_timer_keepalive();
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}
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clear_bit(0, &timer_alive);
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tco_expect_close = 0;
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return 0;
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}
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static ssize_t sp5100_tco_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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/* See if we got the magic character 'V' and reload the timer */
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if (len) {
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if (!nowayout) {
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size_t i;
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/* note: just in case someone wrote the magic character
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* five months ago... */
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tco_expect_close = 0;
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/* scan to see whether or not we got the magic character
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*/
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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tco_expect_close = 42;
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}
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}
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/* someone wrote to us, we should reload the timer */
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tco_timer_keepalive();
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}
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return len;
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}
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static long sp5100_tco_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int new_options, retval = -EINVAL;
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int new_heartbeat;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static const struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.firmware_version = 0,
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.identity = TCO_MODULE_NAME,
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_SETOPTIONS:
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if (get_user(new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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tco_timer_stop();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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tco_timer_start();
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tco_timer_keepalive();
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retval = 0;
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}
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return retval;
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case WDIOC_KEEPALIVE:
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tco_timer_keepalive();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_heartbeat, p))
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return -EFAULT;
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if (tco_timer_set_heartbeat(new_heartbeat))
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return -EINVAL;
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tco_timer_keepalive();
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/* Fall through */
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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default:
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return -ENOTTY;
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}
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}
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/*
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* Kernel Interfaces
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*/
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static const struct file_operations sp5100_tco_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = sp5100_tco_write,
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.unlocked_ioctl = sp5100_tco_ioctl,
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.open = sp5100_tco_open,
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.release = sp5100_tco_release,
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};
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static struct miscdevice sp5100_tco_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &sp5100_tco_fops,
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};
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/*
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* Data for PCI driver interface
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*
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* This data only exists for exporting the supported
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* PCI ids via MODULE_DEVICE_TABLE. We do not actually
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* register a pci_driver, because someone else might
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* want to register another driver on the same PCI id.
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*/
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static const struct pci_device_id sp5100_tco_pci_tbl[] = {
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{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
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PCI_ANY_ID, },
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID,
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PCI_ANY_ID, },
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, PCI_ANY_ID,
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PCI_ANY_ID, },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
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/*
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* Init & exit routines
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*/
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static unsigned char sp5100_tco_setupdevice(void)
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{
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struct pci_dev *dev = NULL;
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const char *dev_name = NULL;
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u32 val;
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u32 index_reg, data_reg, base_addr;
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/* Match the PCI device */
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for_each_pci_dev(dev) {
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if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
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sp5100_tco_pci = dev;
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break;
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}
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}
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if (!sp5100_tco_pci)
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return 0;
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pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n",
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sp5100_tco_pci->vendor, sp5100_tco_pci->device,
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sp5100_tco_pci->revision);
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/*
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* Determine type of southbridge chipset.
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*/
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if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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dev_name = SP5100_DEVNAME;
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index_reg = SP5100_IO_PM_INDEX_REG;
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data_reg = SP5100_IO_PM_DATA_REG;
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base_addr = SP5100_PM_WATCHDOG_BASE;
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} else {
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dev_name = SB800_DEVNAME;
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index_reg = SB800_IO_PM_INDEX_REG;
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data_reg = SB800_IO_PM_DATA_REG;
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base_addr = SB800_PM_WATCHDOG_BASE;
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}
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/* Request the IO ports used by this driver */
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pm_iobase = SP5100_IO_PM_INDEX_REG;
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if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, dev_name)) {
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pr_err("I/O address 0x%04x already in use\n", pm_iobase);
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goto exit;
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}
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/*
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* First, Find the watchdog timer MMIO address from indirect I/O.
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*/
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outb(base_addr+3, index_reg);
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val = inb(data_reg);
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outb(base_addr+2, index_reg);
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val = val << 8 | inb(data_reg);
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outb(base_addr+1, index_reg);
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val = val << 8 | inb(data_reg);
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outb(base_addr+0, index_reg);
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/* Low three bits of BASE are reserved */
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val = val << 8 | (inb(data_reg) & 0xf8);
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pr_debug("Got 0x%04x from indirect I/O\n", val);
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/* Check MMIO address conflict */
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if (request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
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dev_name))
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goto setup_wdt;
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else
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pr_debug("MMIO address 0x%04x already in use\n", val);
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/*
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* Secondly, Find the watchdog timer MMIO address
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* from SBResource_MMIO register.
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*/
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if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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/* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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pci_read_config_dword(sp5100_tco_pci,
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SP5100_SB_RESOURCE_MMIO_BASE, &val);
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} else {
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/* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
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outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG);
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val = inb(SB800_IO_PM_DATA_REG);
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outb(SB800_PM_ACPI_MMIO_EN+2, SB800_IO_PM_INDEX_REG);
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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outb(SB800_PM_ACPI_MMIO_EN+1, SB800_IO_PM_INDEX_REG);
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG);
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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}
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/* The SBResource_MMIO is enabled and mapped memory space? */
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if ((val & (SB800_ACPI_MMIO_DECODE_EN | SB800_ACPI_MMIO_SEL)) ==
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SB800_ACPI_MMIO_DECODE_EN) {
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/* Clear unnecessary the low twelve bits */
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val &= ~0xFFF;
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/* Add the Watchdog Timer offset to base address. */
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val += SB800_PM_WDT_MMIO_OFFSET;
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/* Check MMIO address conflict */
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if (request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
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dev_name)) {
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pr_debug("Got 0x%04x from SBResource_MMIO register\n",
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val);
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goto setup_wdt;
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} else
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pr_debug("MMIO address 0x%04x already in use\n", val);
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} else
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pr_debug("SBResource_MMIO is disabled(0x%04x)\n", val);
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pr_notice("failed to find MMIO address, giving up.\n");
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goto unreg_region;
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setup_wdt:
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tcobase_phys = val;
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tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
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if (!tcobase) {
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pr_err("failed to get tcobase address\n");
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goto unreg_mem_region;
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}
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pr_info("Using 0x%04x for watchdog MMIO address\n", val);
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/* Setup the watchdog timer */
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tco_timer_enable();
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/* Check that the watchdog action is set to reset the system */
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val = readl(SP5100_WDT_CONTROL(tcobase));
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/*
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* Save WatchDogFired status, because WatchDogFired flag is
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* cleared here.
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*/
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tco_wdt_fired = val & SP5100_PM_WATCHDOG_FIRED;
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val &= ~SP5100_PM_WATCHDOG_ACTION_RESET;
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writel(val, SP5100_WDT_CONTROL(tcobase));
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/* Set a reasonable heartbeat before we stop the timer */
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tco_timer_set_heartbeat(heartbeat);
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/*
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* Stop the TCO before we change anything so we don't race with
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* a zeroed timer.
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*/
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tco_timer_stop();
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/* Done */
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return 1;
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unreg_mem_region:
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release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
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unreg_region:
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release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
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exit:
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return 0;
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}
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static int sp5100_tco_init(struct platform_device *dev)
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{
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int ret;
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/*
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* Check whether or not the hardware watchdog is there. If found, then
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* set it up.
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*/
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if (!sp5100_tco_setupdevice())
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return -ENODEV;
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/* Check to see if last reboot was due to watchdog timeout */
|
|
pr_info("Last reboot was %striggered by watchdog.\n",
|
|
tco_wdt_fired ? "" : "not ");
|
|
|
|
/*
|
|
* Check that the heartbeat value is within it's range.
|
|
* If not, reset to the default.
|
|
*/
|
|
if (tco_timer_set_heartbeat(heartbeat)) {
|
|
heartbeat = WATCHDOG_HEARTBEAT;
|
|
tco_timer_set_heartbeat(heartbeat);
|
|
}
|
|
|
|
ret = misc_register(&sp5100_tco_miscdev);
|
|
if (ret != 0) {
|
|
pr_err("cannot register miscdev on minor=%d (err=%d)\n",
|
|
WATCHDOG_MINOR, ret);
|
|
goto exit;
|
|
}
|
|
|
|
clear_bit(0, &timer_alive);
|
|
|
|
/* Show module parameters */
|
|
pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
|
|
tcobase, heartbeat, nowayout);
|
|
|
|
return 0;
|
|
|
|
exit:
|
|
iounmap(tcobase);
|
|
release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
|
|
release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
|
|
return ret;
|
|
}
|
|
|
|
static void sp5100_tco_cleanup(void)
|
|
{
|
|
/* Stop the timer before we leave */
|
|
if (!nowayout)
|
|
tco_timer_stop();
|
|
|
|
/* Deregister */
|
|
misc_deregister(&sp5100_tco_miscdev);
|
|
iounmap(tcobase);
|
|
release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
|
|
release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
|
|
}
|
|
|
|
static int sp5100_tco_remove(struct platform_device *dev)
|
|
{
|
|
if (tcobase)
|
|
sp5100_tco_cleanup();
|
|
return 0;
|
|
}
|
|
|
|
static void sp5100_tco_shutdown(struct platform_device *dev)
|
|
{
|
|
tco_timer_stop();
|
|
}
|
|
|
|
static struct platform_driver sp5100_tco_driver = {
|
|
.probe = sp5100_tco_init,
|
|
.remove = sp5100_tco_remove,
|
|
.shutdown = sp5100_tco_shutdown,
|
|
.driver = {
|
|
.name = TCO_MODULE_NAME,
|
|
},
|
|
};
|
|
|
|
static int __init sp5100_tco_init_module(void)
|
|
{
|
|
int err;
|
|
|
|
pr_info("SP5100/SB800 TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
|
|
|
|
err = platform_driver_register(&sp5100_tco_driver);
|
|
if (err)
|
|
return err;
|
|
|
|
sp5100_tco_platform_device = platform_device_register_simple(
|
|
TCO_MODULE_NAME, -1, NULL, 0);
|
|
if (IS_ERR(sp5100_tco_platform_device)) {
|
|
err = PTR_ERR(sp5100_tco_platform_device);
|
|
goto unreg_platform_driver;
|
|
}
|
|
|
|
return 0;
|
|
|
|
unreg_platform_driver:
|
|
platform_driver_unregister(&sp5100_tco_driver);
|
|
return err;
|
|
}
|
|
|
|
static void __exit sp5100_tco_cleanup_module(void)
|
|
{
|
|
platform_device_unregister(sp5100_tco_platform_device);
|
|
platform_driver_unregister(&sp5100_tco_driver);
|
|
pr_info("SP5100/SB800 TCO Watchdog Module Unloaded\n");
|
|
}
|
|
|
|
module_init(sp5100_tco_init_module);
|
|
module_exit(sp5100_tco_cleanup_module);
|
|
|
|
MODULE_AUTHOR("Priyanka Gupta");
|
|
MODULE_DESCRIPTION("TCO timer driver for SP5100/SB800 chipset");
|
|
MODULE_LICENSE("GPL");
|