176 lines
4.8 KiB
YAML
176 lines
4.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra194 xHCI controller
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
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exposed by the Tegra XUSB pad controller.
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properties:
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compatible:
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const: nvidia,tegra194-xusb
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reg:
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items:
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- description: base and length of the xHCI host registers
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- description: base and length of the XUSB FPCI registers
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reg-names:
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items:
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- const: hcd
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- const: fpci
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interrupts:
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items:
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- description: xHCI host interrupt
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- description: mailbox interrupt
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clocks:
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items:
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- description: XUSB host clock
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- description: XUSB Falcon source clock
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- description: XUSB SuperSpeed clock
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- description: XUSB SuperSpeed source clock
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- description: XUSB HighSpeed clock source
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- description: XUSB FullSpeed clock source
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- description: USB PLL
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- description: reference clock
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- description: I/O PLL
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clock-names:
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items:
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- const: xusb_host
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- const: xusb_falcon_src
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- const: xusb_ss
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- const: xusb_ss_src
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- const: xusb_hs_src
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- const: xusb_fs_src
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- const: pll_u_480m
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- const: clk_m
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- const: pll_e
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interconnects:
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items:
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- description: read client
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- description: write client
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interconnect-names:
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items:
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- const: dma-mem # read
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- const: write
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iommus:
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maxItems: 1
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nvidia,xusb-padctl:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to the XUSB pad controller that is used to configure
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the USB pads used by the XHCI controller
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phys:
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minItems: 1
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maxItems: 8
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phy-names:
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minItems: 1
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maxItems: 8
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items:
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enum:
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- usb2-0
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- usb2-1
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- usb2-2
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- usb2-3
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- usb3-0
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- usb3-1
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- usb3-2
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- usb3-3
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power-domains:
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items:
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- description: XUSBC power domain (for Host and USB 2.0)
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- description: XUSBA power domain (for SuperSpeed)
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power-domain-names:
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items:
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- const: xusb_host
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- const: xusb_ss
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dvddio-pex-supply:
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description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
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hvddio-pex-supply:
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description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
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avdd-usb-supply:
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description: USB controller power supply. Must supply 3.3 V.
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avdd-pll-utmip-supply:
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description: UTMI PLL power supply. Must supply 1.8 V.
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avdd-pll-uerefe-supply:
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description: PLLE reference PLL power supply. Must supply 1.05 V.
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dvdd-usb-ss-pll-supply:
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description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
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hvdd-usb-ss-pll-e-supply:
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description: High-voltage PLLE power supply. Must supply 1.8 V.
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allOf:
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- $ref: usb-xhci.yaml
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/tegra194-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/memory/tegra194-mc.h>
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#include <dt-bindings/power/tegra194-powergate.h>
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#include <dt-bindings/reset/tegra194-reset.h>
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usb@3610000 {
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compatible = "nvidia,tegra194-xusb";
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reg = <0x03610000 0x40000>,
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<0x03600000 0x10000>;
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reg-names = "hcd", "fpci";
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interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
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<&bpmp TEGRA194_CLK_XUSB_FALCON>,
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<&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
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<&bpmp TEGRA194_CLK_XUSB_SS>,
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<&bpmp TEGRA194_CLK_CLK_M>,
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<&bpmp TEGRA194_CLK_XUSB_FS>,
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<&bpmp TEGRA194_CLK_UTMIPLL>,
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<&bpmp TEGRA194_CLK_CLK_M>,
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<&bpmp TEGRA194_CLK_PLLE>;
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clock-names = "xusb_host", "xusb_falcon_src",
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"xusb_ss", "xusb_ss_src", "xusb_hs_src",
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"xusb_fs_src", "pll_u_480m", "clk_m",
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"pll_e";
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interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
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<&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
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interconnect-names = "dma-mem", "write";
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iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
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power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
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<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
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power-domain-names = "xusb_host", "xusb_ss";
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nvidia,xusb-padctl = <&xusb_padctl>;
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phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_3>, <&phy_usb3_0>,
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<&phy_usb3_2>, <&phy_usb3_3>;
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phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
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};
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