124 lines
2.7 KiB
Plaintext
124 lines
2.7 KiB
Plaintext
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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model = "Broadcom STB (bcm7445)";
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compatible = "brcm,bcm7445", "brcm,brcmstb";
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interrupt-parent = <&gic>;
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "brcm,brahma-b15";
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device_type = "cpu";
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enable-method = "brcm,brahma-b15";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,brahma-b15";
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device_type = "cpu";
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enable-method = "brcm,brahma-b15";
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reg = <1>;
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};
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cpu@2 {
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compatible = "brcm,brahma-b15";
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device_type = "cpu";
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enable-method = "brcm,brahma-b15";
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reg = <2>;
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};
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cpu@3 {
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compatible = "brcm,brahma-b15";
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device_type = "cpu";
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enable-method = "brcm,brahma-b15";
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reg = <3>;
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};
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};
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gic: interrupt-controller@ffd00000 {
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compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
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reg = <0x00 0xffd01000 0x00 0x1000>,
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<0x00 0xffd02000 0x00 0x2000>,
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<0x00 0xffd04000 0x00 0x2000>,
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<0x00 0xffd06000 0x00 0x2000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
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};
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rdb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0 0x00 0xf0000000 0x1000000>;
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serial@40ab00 {
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compatible = "ns16550a";
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reg = <0x40ab00 0x20>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <81000000>;
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};
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7445-sun-top-ctrl",
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"syscon";
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reg = <0x404000 0x51c>;
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};
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hif_cpubiuctrl: syscon@3e2400 {
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compatible = "brcm,bcm7445-hif-cpubiuctrl",
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"syscon";
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reg = <0x3e2400 0x5b4>;
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};
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hif_continuation: syscon@452000 {
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compatible = "brcm,bcm7445-hif-continuation",
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"syscon";
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reg = <0x452000 0x100>;
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};
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irq0_intc: interrupt-controller@40a780 {
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compatible = "brcm,bcm7120-l2-intc";
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interrupt-parent = <&gic>;
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#interrupt-cells = <1>;
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reg = <0x40a780 0x8>;
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interrupt-controller;
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interrupts = <GIC_SPI 0x45 0x0>,
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<GIC_SPI 0x43 0x0>;
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brcm,int-map-mask = <0x25c>, <0x7000000>;
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brcm,int-fwd-mask = <0x70000>;
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};
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};
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smpboot {
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compatible = "brcm,brcmstb-smpboot";
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syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
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syscon-cont = <&hif_continuation>;
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};
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reboot {
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compatible = "brcm,brcmstb-reboot";
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syscon = <&sun_top_ctrl 0x304 0x308>;
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};
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};
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