1441 lines
43 KiB
C
1441 lines
43 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Universal Flash Storage Host controller driver
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* Copyright (C) 2011-2013 Samsung India Software Operations
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* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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*
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* Authors:
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* Santosh Yaraganavi <santosh.sy@samsung.com>
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* Vinayak Holikatti <h.vinayak@samsung.com>
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*/
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#ifndef _UFSHCD_H
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#define _UFSHCD_H
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/rwsem.h>
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#include <linux/workqueue.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/bitops.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/regulator/consumer.h>
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#include <linux/bitfield.h>
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#include <linux/devfreq.h>
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#include <linux/blk-crypto-profile.h>
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#include "unipro.h"
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#include <asm/irq.h>
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#include <asm/byteorder.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_dbg.h>
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#include <scsi/scsi_eh.h>
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#include "ufs.h"
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#include "ufs_quirks.h"
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#include "ufshci.h"
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#define UFSHCD "ufshcd"
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#define UFSHCD_DRIVER_VERSION "0.2"
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struct ufs_hba;
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enum dev_cmd_type {
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DEV_CMD_TYPE_NOP = 0x0,
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DEV_CMD_TYPE_QUERY = 0x1,
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};
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enum ufs_event_type {
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/* uic specific errors */
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UFS_EVT_PA_ERR = 0,
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UFS_EVT_DL_ERR,
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UFS_EVT_NL_ERR,
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UFS_EVT_TL_ERR,
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UFS_EVT_DME_ERR,
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/* fatal errors */
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UFS_EVT_AUTO_HIBERN8_ERR,
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UFS_EVT_FATAL_ERR,
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UFS_EVT_LINK_STARTUP_FAIL,
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UFS_EVT_RESUME_ERR,
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UFS_EVT_SUSPEND_ERR,
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UFS_EVT_WL_SUSP_ERR,
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UFS_EVT_WL_RES_ERR,
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/* abnormal events */
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UFS_EVT_DEV_RESET,
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UFS_EVT_HOST_RESET,
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UFS_EVT_ABORT,
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UFS_EVT_CNT,
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};
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/**
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* struct uic_command - UIC command structure
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* @command: UIC command
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* @argument1: UIC command argument 1
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* @argument2: UIC command argument 2
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* @argument3: UIC command argument 3
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* @cmd_active: Indicate if UIC command is outstanding
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* @done: UIC command completion
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*/
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struct uic_command {
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u32 command;
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u32 argument1;
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u32 argument2;
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u32 argument3;
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int cmd_active;
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struct completion done;
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};
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/* Used to differentiate the power management options */
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enum ufs_pm_op {
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UFS_RUNTIME_PM,
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UFS_SYSTEM_PM,
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UFS_SHUTDOWN_PM,
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};
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/* Host <-> Device UniPro Link state */
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enum uic_link_state {
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UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
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UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
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UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
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UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
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};
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#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
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#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
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UIC_LINK_HIBERN8_STATE)
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#define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
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UIC_LINK_BROKEN_STATE)
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#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
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#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
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UIC_LINK_HIBERN8_STATE)
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#define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
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UIC_LINK_BROKEN_STATE)
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#define ufshcd_set_ufs_dev_active(h) \
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((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
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#define ufshcd_set_ufs_dev_sleep(h) \
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((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
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#define ufshcd_set_ufs_dev_poweroff(h) \
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((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
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#define ufshcd_set_ufs_dev_deepsleep(h) \
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((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
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#define ufshcd_is_ufs_dev_active(h) \
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((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
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#define ufshcd_is_ufs_dev_sleep(h) \
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((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
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#define ufshcd_is_ufs_dev_poweroff(h) \
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((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
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#define ufshcd_is_ufs_dev_deepsleep(h) \
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((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
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/*
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* UFS Power management levels.
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* Each level is in increasing order of power savings, except DeepSleep
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* which is lower than PowerDown with power on but not PowerDown with
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* power off.
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*/
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enum ufs_pm_level {
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UFS_PM_LVL_0,
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UFS_PM_LVL_1,
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UFS_PM_LVL_2,
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UFS_PM_LVL_3,
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UFS_PM_LVL_4,
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UFS_PM_LVL_5,
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UFS_PM_LVL_6,
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UFS_PM_LVL_MAX
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};
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struct ufs_pm_lvl_states {
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enum ufs_dev_pwr_mode dev_state;
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enum uic_link_state link_state;
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};
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/**
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* struct ufshcd_lrb - local reference block
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* @utr_descriptor_ptr: UTRD address of the command
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* @ucd_req_ptr: UCD address of the command
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* @ucd_rsp_ptr: Response UPIU address for this command
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* @ucd_prdt_ptr: PRDT address of the command
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* @utrd_dma_addr: UTRD dma address for debug
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* @ucd_prdt_dma_addr: PRDT dma address for debug
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* @ucd_rsp_dma_addr: UPIU response dma address for debug
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* @ucd_req_dma_addr: UPIU request dma address for debug
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* @cmd: pointer to SCSI command
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* @sense_buffer: pointer to sense buffer address of the SCSI command
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* @sense_bufflen: Length of the sense buffer
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* @scsi_status: SCSI status of the command
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* @command_type: SCSI, UFS, Query.
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* @task_tag: Task tag of the command
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* @lun: LUN of the command
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* @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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* @issue_time_stamp: time stamp for debug purposes
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* @compl_time_stamp: time stamp for statistics
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* @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
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* @data_unit_num: the data unit number for the first block for inline crypto
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* @req_abort_skip: skip request abort task flag
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*/
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struct ufshcd_lrb {
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struct utp_transfer_req_desc *utr_descriptor_ptr;
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struct utp_upiu_req *ucd_req_ptr;
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struct utp_upiu_rsp *ucd_rsp_ptr;
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struct ufshcd_sg_entry *ucd_prdt_ptr;
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dma_addr_t utrd_dma_addr;
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dma_addr_t ucd_req_dma_addr;
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dma_addr_t ucd_rsp_dma_addr;
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dma_addr_t ucd_prdt_dma_addr;
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struct scsi_cmnd *cmd;
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u8 *sense_buffer;
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unsigned int sense_bufflen;
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int scsi_status;
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int command_type;
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int task_tag;
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u8 lun; /* UPIU LUN id field is only 8-bit wide */
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bool intr_cmd;
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ktime_t issue_time_stamp;
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ktime_t compl_time_stamp;
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#ifdef CONFIG_SCSI_UFS_CRYPTO
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int crypto_key_slot;
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u64 data_unit_num;
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#endif
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bool req_abort_skip;
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};
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/**
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* struct ufs_query - holds relevant data structures for query request
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* @request: request upiu and function
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* @descriptor: buffer for sending/receiving descriptor
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* @response: response upiu and response
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*/
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struct ufs_query {
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struct ufs_query_req request;
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u8 *descriptor;
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struct ufs_query_res response;
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};
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/**
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* struct ufs_dev_cmd - all assosiated fields with device management commands
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* @type: device management command type - Query, NOP OUT
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* @lock: lock to allow one command at a time
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* @complete: internal commands completion
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*/
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struct ufs_dev_cmd {
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enum dev_cmd_type type;
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struct mutex lock;
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struct completion *complete;
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struct ufs_query query;
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};
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/**
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* struct ufs_clk_info - UFS clock related info
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* @list: list headed by hba->clk_list_head
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* @clk: clock node
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* @name: clock name
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* @max_freq: maximum frequency supported by the clock
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* @min_freq: min frequency that can be used for clock scaling
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* @curr_freq: indicates the current frequency that it is set to
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* @keep_link_active: indicates that the clk should not be disabled if
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link is active
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* @enabled: variable to check against multiple enable/disable
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*/
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struct ufs_clk_info {
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struct list_head list;
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struct clk *clk;
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const char *name;
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u32 max_freq;
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u32 min_freq;
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u32 curr_freq;
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bool keep_link_active;
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bool enabled;
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};
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enum ufs_notify_change_status {
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PRE_CHANGE,
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POST_CHANGE,
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};
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struct ufs_pa_layer_attr {
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u32 gear_rx;
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u32 gear_tx;
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u32 lane_rx;
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u32 lane_tx;
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u32 pwr_rx;
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u32 pwr_tx;
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u32 hs_rate;
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};
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struct ufs_pwr_mode_info {
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bool is_valid;
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struct ufs_pa_layer_attr info;
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};
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/**
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* struct ufs_hba_variant_ops - variant specific callbacks
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* @name: variant name
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* @init: called when the driver is initialized
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* @exit: called to cleanup everything done in init
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* @get_ufs_hci_version: called to get UFS HCI version
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* @clk_scale_notify: notifies that clks are scaled up/down
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* @setup_clocks: called before touching any of the controller registers
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* @hce_enable_notify: called before and after HCE enable bit is set to allow
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* variant specific Uni-Pro initialization.
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* @link_startup_notify: called before and after Link startup is carried out
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* to allow variant specific Uni-Pro initialization.
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* @pwr_change_notify: called before and after a power mode change
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* is carried out to allow vendor spesific capabilities
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* to be set.
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* @setup_xfer_req: called before any transfer request is issued
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* to set some things
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* @setup_task_mgmt: called before any task management request is issued
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* to set some things
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* @hibern8_notify: called around hibern8 enter/exit
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* @apply_dev_quirks: called to apply device specific quirks
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* @suspend: called during host controller PM callback
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* @resume: called during host controller PM callback
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* @dbg_register_dump: used to dump controller debug information
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* @phy_initialization: used to initialize phys
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* @device_reset: called to issue a reset pulse on the UFS device
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* @program_key: program or evict an inline encryption key
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* @event_notify: called to notify important events
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*/
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struct ufs_hba_variant_ops {
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const char *name;
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int (*init)(struct ufs_hba *);
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void (*exit)(struct ufs_hba *);
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u32 (*get_ufs_hci_version)(struct ufs_hba *);
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int (*clk_scale_notify)(struct ufs_hba *, bool,
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enum ufs_notify_change_status);
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int (*setup_clocks)(struct ufs_hba *, bool,
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enum ufs_notify_change_status);
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int (*hce_enable_notify)(struct ufs_hba *,
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enum ufs_notify_change_status);
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int (*link_startup_notify)(struct ufs_hba *,
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enum ufs_notify_change_status);
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int (*pwr_change_notify)(struct ufs_hba *,
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enum ufs_notify_change_status status,
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struct ufs_pa_layer_attr *,
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struct ufs_pa_layer_attr *);
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void (*setup_xfer_req)(struct ufs_hba *hba, int tag,
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bool is_scsi_cmd);
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void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
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void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
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enum ufs_notify_change_status);
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int (*apply_dev_quirks)(struct ufs_hba *hba);
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void (*fixup_dev_quirks)(struct ufs_hba *hba);
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int (*suspend)(struct ufs_hba *, enum ufs_pm_op,
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enum ufs_notify_change_status);
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int (*resume)(struct ufs_hba *, enum ufs_pm_op);
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void (*dbg_register_dump)(struct ufs_hba *hba);
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int (*phy_initialization)(struct ufs_hba *);
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int (*device_reset)(struct ufs_hba *hba);
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void (*config_scaling_param)(struct ufs_hba *hba,
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struct devfreq_dev_profile *profile,
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void *data);
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int (*program_key)(struct ufs_hba *hba,
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const union ufs_crypto_cfg_entry *cfg, int slot);
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void (*event_notify)(struct ufs_hba *hba,
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enum ufs_event_type evt, void *data);
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};
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/* clock gating state */
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enum clk_gating_state {
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CLKS_OFF,
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CLKS_ON,
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REQ_CLKS_OFF,
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REQ_CLKS_ON,
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};
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/**
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* struct ufs_clk_gating - UFS clock gating related info
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* @gate_work: worker to turn off clocks after some delay as specified in
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* delay_ms
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* @ungate_work: worker to turn on clocks that will be used in case of
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* interrupt context
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* @state: the current clocks state
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* @delay_ms: gating delay in ms
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* @is_suspended: clk gating is suspended when set to 1 which can be used
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* during suspend/resume
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* @delay_attr: sysfs attribute to control delay_attr
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* @enable_attr: sysfs attribute to enable/disable clock gating
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* @is_enabled: Indicates the current status of clock gating
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* @is_initialized: Indicates whether clock gating is initialized or not
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* @active_reqs: number of requests that are pending and should be waited for
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* completion before gating clocks.
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*/
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struct ufs_clk_gating {
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struct delayed_work gate_work;
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struct work_struct ungate_work;
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enum clk_gating_state state;
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unsigned long delay_ms;
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bool is_suspended;
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struct device_attribute delay_attr;
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struct device_attribute enable_attr;
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bool is_enabled;
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bool is_initialized;
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int active_reqs;
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struct workqueue_struct *clk_gating_workq;
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};
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struct ufs_saved_pwr_info {
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struct ufs_pa_layer_attr info;
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bool is_valid;
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};
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/**
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* struct ufs_clk_scaling - UFS clock scaling related data
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* @active_reqs: number of requests that are pending. If this is zero when
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* devfreq ->target() function is called then schedule "suspend_work" to
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* suspend devfreq.
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* @tot_busy_t: Total busy time in current polling window
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* @window_start_t: Start time (in jiffies) of the current polling window
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* @busy_start_t: Start time of current busy period
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* @enable_attr: sysfs attribute to enable/disable clock scaling
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* @saved_pwr_info: UFS power mode may also be changed during scaling and this
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* one keeps track of previous power mode.
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* @workq: workqueue to schedule devfreq suspend/resume work
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* @suspend_work: worker to suspend devfreq
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* @resume_work: worker to resume devfreq
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* @min_gear: lowest HS gear to scale down to
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* @is_enabled: tracks if scaling is currently enabled or not, controlled by
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clkscale_enable sysfs node
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* @is_allowed: tracks if scaling is currently allowed or not, used to block
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clock scaling which is not invoked from devfreq governor
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* @is_initialized: Indicates whether clock scaling is initialized or not
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* @is_busy_started: tracks if busy period has started or not
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* @is_suspended: tracks if devfreq is suspended or not
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*/
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struct ufs_clk_scaling {
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int active_reqs;
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unsigned long tot_busy_t;
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ktime_t window_start_t;
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ktime_t busy_start_t;
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struct device_attribute enable_attr;
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struct ufs_saved_pwr_info saved_pwr_info;
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struct workqueue_struct *workq;
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struct work_struct suspend_work;
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struct work_struct resume_work;
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u32 min_gear;
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bool is_enabled;
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bool is_allowed;
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bool is_initialized;
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bool is_busy_started;
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bool is_suspended;
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};
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#define UFS_EVENT_HIST_LENGTH 8
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/**
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* struct ufs_event_hist - keeps history of errors
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* @pos: index to indicate cyclic buffer position
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* @reg: cyclic buffer for registers value
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* @tstamp: cyclic buffer for time stamp
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* @cnt: error counter
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*/
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struct ufs_event_hist {
|
|
int pos;
|
|
u32 val[UFS_EVENT_HIST_LENGTH];
|
|
ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
|
|
unsigned long long cnt;
|
|
};
|
|
|
|
/**
|
|
* struct ufs_stats - keeps usage/err statistics
|
|
* @last_intr_status: record the last interrupt status.
|
|
* @last_intr_ts: record the last interrupt timestamp.
|
|
* @hibern8_exit_cnt: Counter to keep track of number of exits,
|
|
* reset this after link-startup.
|
|
* @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
|
|
* Clear after the first successful command completion.
|
|
*/
|
|
struct ufs_stats {
|
|
u32 last_intr_status;
|
|
ktime_t last_intr_ts;
|
|
|
|
u32 hibern8_exit_cnt;
|
|
ktime_t last_hibern8_exit_tstamp;
|
|
struct ufs_event_hist event[UFS_EVT_CNT];
|
|
};
|
|
|
|
/**
|
|
* enum ufshcd_state - UFS host controller state
|
|
* @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command
|
|
* processing.
|
|
* @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process
|
|
* SCSI commands.
|
|
* @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled.
|
|
* SCSI commands may be submitted to the controller.
|
|
* @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail
|
|
* newly submitted SCSI commands with error code DID_BAD_TARGET.
|
|
* @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery
|
|
* failed. Fail all SCSI commands with error code DID_ERROR.
|
|
*/
|
|
enum ufshcd_state {
|
|
UFSHCD_STATE_RESET,
|
|
UFSHCD_STATE_OPERATIONAL,
|
|
UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
|
|
UFSHCD_STATE_EH_SCHEDULED_FATAL,
|
|
UFSHCD_STATE_ERROR,
|
|
};
|
|
|
|
enum ufshcd_quirks {
|
|
/* Interrupt aggregation support is broken */
|
|
UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
|
|
|
|
/*
|
|
* delay before each dme command is required as the unipro
|
|
* layer has shown instabilities
|
|
*/
|
|
UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
|
|
|
|
/*
|
|
* If UFS host controller is having issue in processing LCC (Line
|
|
* Control Command) coming from device then enable this quirk.
|
|
* When this quirk is enabled, host controller driver should disable
|
|
* the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
|
|
* attribute of device to 0).
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
|
|
|
|
/*
|
|
* The attribute PA_RXHSUNTERMCAP specifies whether or not the
|
|
* inbound Link supports unterminated line in HS mode. Setting this
|
|
* attribute to 1 fixes moving to HS gear.
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller only allows
|
|
* accessing the peer dme attributes in AUTO mode (FAST AUTO or
|
|
* SLOW AUTO).
|
|
*/
|
|
UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller doesn't
|
|
* advertise the correct version in UFS_VER register. If this quirk
|
|
* is enabled, standard UFS host driver will call the vendor specific
|
|
* ops (get_ufs_hci_version) to get the correct version.
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
|
|
|
|
/*
|
|
* Clear handling for transfer/task request list is just opposite.
|
|
*/
|
|
UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if host controller doesn't allow
|
|
* that the interrupt aggregation timer and counter are reset by s/w.
|
|
*/
|
|
UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
|
|
|
|
/*
|
|
* This quirks needs to be enabled if host controller cannot be
|
|
* enabled via HCE register.
|
|
*/
|
|
UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller regards
|
|
* resolution of the values of PRDTO and PRDTL in UTRD as byte.
|
|
*/
|
|
UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller reports
|
|
* OCS FATAL ERROR with device error through sense data
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller has
|
|
* auto-hibernate capability but it doesn't work.
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
|
|
|
|
/*
|
|
* This quirk needs to disable manual flush for write booster
|
|
*/
|
|
UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
|
|
|
|
/*
|
|
* This quirk needs to disable unipro timeout values
|
|
* before power mode change
|
|
*/
|
|
UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
|
|
|
|
/*
|
|
* This quirk allows only sg entries aligned with page size.
|
|
*/
|
|
UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller does not
|
|
* support UIC command
|
|
*/
|
|
UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
|
|
|
|
/*
|
|
* This quirk needs to be enabled if the host controller cannot
|
|
* support physical host configuration.
|
|
*/
|
|
UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16,
|
|
};
|
|
|
|
enum ufshcd_caps {
|
|
/* Allow dynamic clk gating */
|
|
UFSHCD_CAP_CLK_GATING = 1 << 0,
|
|
|
|
/* Allow hiberb8 with clk gating */
|
|
UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
|
|
|
|
/* Allow dynamic clk scaling */
|
|
UFSHCD_CAP_CLK_SCALING = 1 << 2,
|
|
|
|
/* Allow auto bkops to enabled during runtime suspend */
|
|
UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
|
|
|
|
/*
|
|
* This capability allows host controller driver to use the UFS HCI's
|
|
* interrupt aggregation capability.
|
|
* CAUTION: Enabling this might reduce overall UFS throughput.
|
|
*/
|
|
UFSHCD_CAP_INTR_AGGR = 1 << 4,
|
|
|
|
/*
|
|
* This capability allows the device auto-bkops to be always enabled
|
|
* except during suspend (both runtime and suspend).
|
|
* Enabling this capability means that device will always be allowed
|
|
* to do background operation when it's active but it might degrade
|
|
* the performance of ongoing read/write operations.
|
|
*/
|
|
UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
|
|
|
|
/*
|
|
* This capability allows host controller driver to automatically
|
|
* enable runtime power management by itself instead of waiting
|
|
* for userspace to control the power management.
|
|
*/
|
|
UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
|
|
|
|
/*
|
|
* This capability allows the host controller driver to turn-on
|
|
* WriteBooster, if the underlying device supports it and is
|
|
* provisioned to be used. This would increase the write performance.
|
|
*/
|
|
UFSHCD_CAP_WB_EN = 1 << 7,
|
|
|
|
/*
|
|
* This capability allows the host controller driver to use the
|
|
* inline crypto engine, if it is present
|
|
*/
|
|
UFSHCD_CAP_CRYPTO = 1 << 8,
|
|
|
|
/*
|
|
* This capability allows the controller regulators to be put into
|
|
* lpm mode aggressively during clock gating.
|
|
* This would increase power savings.
|
|
*/
|
|
UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
|
|
|
|
/*
|
|
* This capability allows the host controller driver to use DeepSleep,
|
|
* if it is supported by the UFS device. The host controller driver must
|
|
* support device hardware reset via the hba->device_reset() callback,
|
|
* in order to exit DeepSleep state.
|
|
*/
|
|
UFSHCD_CAP_DEEPSLEEP = 1 << 10,
|
|
|
|
/*
|
|
* This capability allows the host controller driver to use temperature
|
|
* notification if it is supported by the UFS device.
|
|
*/
|
|
UFSHCD_CAP_TEMP_NOTIF = 1 << 11,
|
|
};
|
|
|
|
struct ufs_hba_variant_params {
|
|
struct devfreq_dev_profile devfreq_profile;
|
|
struct devfreq_simple_ondemand_data ondemand_data;
|
|
u16 hba_enable_delay_us;
|
|
u32 wb_flush_threshold;
|
|
};
|
|
|
|
#ifdef CONFIG_SCSI_UFS_HPB
|
|
/**
|
|
* struct ufshpb_dev_info - UFSHPB device related info
|
|
* @num_lu: the number of user logical unit to check whether all lu finished
|
|
* initialization
|
|
* @rgn_size: device reported HPB region size
|
|
* @srgn_size: device reported HPB sub-region size
|
|
* @slave_conf_cnt: counter to check all lu finished initialization
|
|
* @hpb_disabled: flag to check if HPB is disabled
|
|
* @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
|
|
* @is_legacy: flag to check HPB 1.0
|
|
* @control_mode: either host or device
|
|
*/
|
|
struct ufshpb_dev_info {
|
|
int num_lu;
|
|
int rgn_size;
|
|
int srgn_size;
|
|
atomic_t slave_conf_cnt;
|
|
bool hpb_disabled;
|
|
u8 max_hpb_single_cmd;
|
|
bool is_legacy;
|
|
u8 control_mode;
|
|
};
|
|
#endif
|
|
|
|
struct ufs_hba_monitor {
|
|
unsigned long chunk_size;
|
|
|
|
unsigned long nr_sec_rw[2];
|
|
ktime_t total_busy[2];
|
|
|
|
unsigned long nr_req[2];
|
|
/* latencies*/
|
|
ktime_t lat_sum[2];
|
|
ktime_t lat_max[2];
|
|
ktime_t lat_min[2];
|
|
|
|
u32 nr_queued[2];
|
|
ktime_t busy_start_ts[2];
|
|
|
|
ktime_t enabled_ts;
|
|
bool enabled;
|
|
};
|
|
|
|
/**
|
|
* struct ufs_hba - per adapter private structure
|
|
* @mmio_base: UFSHCI base register address
|
|
* @ucdl_base_addr: UFS Command Descriptor base address
|
|
* @utrdl_base_addr: UTP Transfer Request Descriptor base address
|
|
* @utmrdl_base_addr: UTP Task Management Descriptor base address
|
|
* @ucdl_dma_addr: UFS Command Descriptor DMA address
|
|
* @utrdl_dma_addr: UTRDL DMA address
|
|
* @utmrdl_dma_addr: UTMRDL DMA address
|
|
* @host: Scsi_Host instance of the driver
|
|
* @dev: device handle
|
|
* @lrb: local reference block
|
|
* @outstanding_tasks: Bits representing outstanding task requests
|
|
* @outstanding_lock: Protects @outstanding_reqs.
|
|
* @outstanding_reqs: Bits representing outstanding transfer requests
|
|
* @capabilities: UFS Controller Capabilities
|
|
* @nutrs: Transfer Request Queue depth supported by controller
|
|
* @nutmrs: Task Management Queue depth supported by controller
|
|
* @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
|
|
* @ufs_version: UFS Version to which controller complies
|
|
* @vops: pointer to variant specific operations
|
|
* @priv: pointer to variant specific private data
|
|
* @irq: Irq number of the controller
|
|
* @active_uic_cmd: handle of active UIC command
|
|
* @uic_cmd_mutex: mutex for UIC command
|
|
* @tmf_tag_set: TMF tag set.
|
|
* @tmf_queue: Used to allocate TMF tags.
|
|
* @pwr_done: completion for power mode change
|
|
* @ufshcd_state: UFSHCD state
|
|
* @eh_flags: Error handling flags
|
|
* @intr_mask: Interrupt Mask Bits
|
|
* @ee_ctrl_mask: Exception event control mask
|
|
* @is_powered: flag to check if HBA is powered
|
|
* @shutting_down: flag to check if shutdown has been invoked
|
|
* @host_sem: semaphore used to serialize concurrent contexts
|
|
* @eh_wq: Workqueue that eh_work works on
|
|
* @eh_work: Worker to handle UFS errors that require s/w attention
|
|
* @eeh_work: Worker to handle exception events
|
|
* @errors: HBA errors
|
|
* @uic_error: UFS interconnect layer error status
|
|
* @saved_err: sticky error mask
|
|
* @saved_uic_err: sticky UIC error mask
|
|
* @force_reset: flag to force eh_work perform a full reset
|
|
* @force_pmc: flag to force a power mode change
|
|
* @silence_err_logs: flag to silence error logs
|
|
* @dev_cmd: ufs device management command information
|
|
* @last_dme_cmd_tstamp: time stamp of the last completed DME command
|
|
* @auto_bkops_enabled: to track whether bkops is enabled in device
|
|
* @vreg_info: UFS device voltage regulator information
|
|
* @clk_list_head: UFS host controller clocks list node head
|
|
* @pwr_info: holds current power mode
|
|
* @max_pwr_info: keeps the device max valid pwm
|
|
* @clk_scaling_lock: used to serialize device commands and clock scaling
|
|
* @desc_size: descriptor sizes reported by device
|
|
* @urgent_bkops_lvl: keeps track of urgent bkops level for device
|
|
* @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
|
|
* device is known or not.
|
|
* @scsi_block_reqs_cnt: reference counting for scsi block requests
|
|
* @crypto_capabilities: Content of crypto capabilities register (0x100)
|
|
* @crypto_cap_array: Array of crypto capabilities
|
|
* @crypto_cfg_register: Start of the crypto cfg array
|
|
* @crypto_profile: the crypto profile of this hba (if applicable)
|
|
*/
|
|
struct ufs_hba {
|
|
void __iomem *mmio_base;
|
|
|
|
/* Virtual memory reference */
|
|
struct utp_transfer_cmd_desc *ucdl_base_addr;
|
|
struct utp_transfer_req_desc *utrdl_base_addr;
|
|
struct utp_task_req_desc *utmrdl_base_addr;
|
|
|
|
/* DMA memory reference */
|
|
dma_addr_t ucdl_dma_addr;
|
|
dma_addr_t utrdl_dma_addr;
|
|
dma_addr_t utmrdl_dma_addr;
|
|
|
|
struct Scsi_Host *host;
|
|
struct device *dev;
|
|
/*
|
|
* This field is to keep a reference to "scsi_device" corresponding to
|
|
* "UFS device" W-LU.
|
|
*/
|
|
struct scsi_device *sdev_ufs_device;
|
|
|
|
#ifdef CONFIG_SCSI_UFS_HWMON
|
|
struct device *hwmon_device;
|
|
#endif
|
|
|
|
enum ufs_dev_pwr_mode curr_dev_pwr_mode;
|
|
enum uic_link_state uic_link_state;
|
|
/* Desired UFS power management level during runtime PM */
|
|
enum ufs_pm_level rpm_lvl;
|
|
/* Desired UFS power management level during system PM */
|
|
enum ufs_pm_level spm_lvl;
|
|
struct device_attribute rpm_lvl_attr;
|
|
struct device_attribute spm_lvl_attr;
|
|
int pm_op_in_progress;
|
|
|
|
/* Auto-Hibernate Idle Timer register value */
|
|
u32 ahit;
|
|
|
|
struct ufshcd_lrb *lrb;
|
|
|
|
unsigned long outstanding_tasks;
|
|
spinlock_t outstanding_lock;
|
|
unsigned long outstanding_reqs;
|
|
|
|
u32 capabilities;
|
|
int nutrs;
|
|
int nutmrs;
|
|
u32 reserved_slot;
|
|
u32 ufs_version;
|
|
const struct ufs_hba_variant_ops *vops;
|
|
struct ufs_hba_variant_params *vps;
|
|
void *priv;
|
|
unsigned int irq;
|
|
bool is_irq_enabled;
|
|
enum ufs_ref_clk_freq dev_ref_clk_freq;
|
|
|
|
unsigned int quirks; /* Deviations from standard UFSHCI spec. */
|
|
|
|
/* Device deviations from standard UFS device spec. */
|
|
unsigned int dev_quirks;
|
|
|
|
struct blk_mq_tag_set tmf_tag_set;
|
|
struct request_queue *tmf_queue;
|
|
struct request **tmf_rqs;
|
|
|
|
struct uic_command *active_uic_cmd;
|
|
struct mutex uic_cmd_mutex;
|
|
struct completion *uic_async_done;
|
|
|
|
enum ufshcd_state ufshcd_state;
|
|
u32 eh_flags;
|
|
u32 intr_mask;
|
|
u16 ee_ctrl_mask; /* Exception event mask */
|
|
u16 ee_drv_mask; /* Exception event mask for driver */
|
|
u16 ee_usr_mask; /* Exception event mask for user (via debugfs) */
|
|
struct mutex ee_ctrl_mutex;
|
|
bool is_powered;
|
|
bool shutting_down;
|
|
struct semaphore host_sem;
|
|
|
|
/* Work Queues */
|
|
struct workqueue_struct *eh_wq;
|
|
struct work_struct eh_work;
|
|
struct work_struct eeh_work;
|
|
|
|
/* HBA Errors */
|
|
u32 errors;
|
|
u32 uic_error;
|
|
u32 saved_err;
|
|
u32 saved_uic_err;
|
|
struct ufs_stats ufs_stats;
|
|
bool force_reset;
|
|
bool force_pmc;
|
|
bool silence_err_logs;
|
|
|
|
/* Device management request data */
|
|
struct ufs_dev_cmd dev_cmd;
|
|
ktime_t last_dme_cmd_tstamp;
|
|
int nop_out_timeout;
|
|
|
|
/* Keeps information of the UFS device connected to this host */
|
|
struct ufs_dev_info dev_info;
|
|
bool auto_bkops_enabled;
|
|
struct ufs_vreg_info vreg_info;
|
|
struct list_head clk_list_head;
|
|
|
|
/* Number of requests aborts */
|
|
int req_abort_count;
|
|
|
|
/* Number of lanes available (1 or 2) for Rx/Tx */
|
|
u32 lanes_per_direction;
|
|
struct ufs_pa_layer_attr pwr_info;
|
|
struct ufs_pwr_mode_info max_pwr_info;
|
|
|
|
struct ufs_clk_gating clk_gating;
|
|
/* Control to enable/disable host capabilities */
|
|
u32 caps;
|
|
|
|
struct devfreq *devfreq;
|
|
struct ufs_clk_scaling clk_scaling;
|
|
bool is_sys_suspended;
|
|
|
|
enum bkops_status urgent_bkops_lvl;
|
|
bool is_urgent_bkops_lvl_checked;
|
|
|
|
struct rw_semaphore clk_scaling_lock;
|
|
unsigned char desc_size[QUERY_DESC_IDN_MAX];
|
|
atomic_t scsi_block_reqs_cnt;
|
|
|
|
struct device bsg_dev;
|
|
struct request_queue *bsg_queue;
|
|
struct delayed_work rpm_dev_flush_recheck_work;
|
|
|
|
#ifdef CONFIG_SCSI_UFS_HPB
|
|
struct ufshpb_dev_info ufshpb_dev;
|
|
#endif
|
|
|
|
struct ufs_hba_monitor monitor;
|
|
|
|
#ifdef CONFIG_SCSI_UFS_CRYPTO
|
|
union ufs_crypto_capabilities crypto_capabilities;
|
|
union ufs_crypto_cap_entry *crypto_cap_array;
|
|
u32 crypto_cfg_register;
|
|
struct blk_crypto_profile crypto_profile;
|
|
#endif
|
|
#ifdef CONFIG_DEBUG_FS
|
|
struct dentry *debugfs_root;
|
|
struct delayed_work debugfs_ee_work;
|
|
u32 debugfs_ee_rate_limit_ms;
|
|
#endif
|
|
u32 luns_avail;
|
|
bool complete_put;
|
|
};
|
|
|
|
/* Returns true if clocks can be gated. Otherwise false */
|
|
static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_CLK_GATING;
|
|
}
|
|
static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
|
|
}
|
|
static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_CLK_SCALING;
|
|
}
|
|
static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
|
|
}
|
|
static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
|
|
}
|
|
|
|
static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
|
|
{
|
|
return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
|
|
!(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
|
|
}
|
|
|
|
static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
|
|
{
|
|
return !!(ufshcd_is_link_hibern8(hba) &&
|
|
(hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
|
|
}
|
|
|
|
static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
|
|
{
|
|
return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
|
|
!(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
|
|
}
|
|
|
|
static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
|
|
{
|
|
return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
|
|
}
|
|
|
|
static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_WB_EN;
|
|
}
|
|
|
|
static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
|
|
{
|
|
return !hba->shutting_down;
|
|
}
|
|
|
|
#define ufshcd_writel(hba, val, reg) \
|
|
writel((val), (hba)->mmio_base + (reg))
|
|
#define ufshcd_readl(hba, reg) \
|
|
readl((hba)->mmio_base + (reg))
|
|
|
|
/**
|
|
* ufshcd_rmwl - read modify write into a register
|
|
* @hba - per adapter instance
|
|
* @mask - mask to apply on read value
|
|
* @val - actual value to write
|
|
* @reg - register address
|
|
*/
|
|
static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
|
|
{
|
|
u32 tmp;
|
|
|
|
tmp = ufshcd_readl(hba, reg);
|
|
tmp &= ~mask;
|
|
tmp |= (val & mask);
|
|
ufshcd_writel(hba, tmp, reg);
|
|
}
|
|
|
|
int ufshcd_alloc_host(struct device *, struct ufs_hba **);
|
|
void ufshcd_dealloc_host(struct ufs_hba *);
|
|
int ufshcd_hba_enable(struct ufs_hba *hba);
|
|
int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
|
|
int ufshcd_link_recovery(struct ufs_hba *hba);
|
|
int ufshcd_make_hba_operational(struct ufs_hba *hba);
|
|
void ufshcd_remove(struct ufs_hba *);
|
|
int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
|
|
int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
|
|
void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
|
|
int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
|
|
u32 val, unsigned long interval_us,
|
|
unsigned long timeout_ms);
|
|
void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
|
|
void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
|
|
void ufshcd_hba_stop(struct ufs_hba *hba);
|
|
void ufshcd_schedule_eh_work(struct ufs_hba *hba);
|
|
|
|
static inline void check_upiu_size(void)
|
|
{
|
|
BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
|
|
GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
|
|
}
|
|
|
|
/**
|
|
* ufshcd_set_variant - set variant specific data to the hba
|
|
* @hba - per adapter instance
|
|
* @variant - pointer to variant specific data
|
|
*/
|
|
static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
|
|
{
|
|
BUG_ON(!hba);
|
|
hba->priv = variant;
|
|
}
|
|
|
|
/**
|
|
* ufshcd_get_variant - get variant specific data from the hba
|
|
* @hba - per adapter instance
|
|
*/
|
|
static inline void *ufshcd_get_variant(struct ufs_hba *hba)
|
|
{
|
|
BUG_ON(!hba);
|
|
return hba->priv;
|
|
}
|
|
static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
|
|
struct ufs_hba *hba)
|
|
{
|
|
return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
|
|
}
|
|
|
|
static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
|
|
{
|
|
if (hba->dev_info.wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
|
|
return hba->dev_info.wb_dedicated_lu;
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SCSI_UFS_HWMON
|
|
void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask);
|
|
void ufs_hwmon_remove(struct ufs_hba *hba);
|
|
void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask);
|
|
#else
|
|
static inline void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask) {}
|
|
static inline void ufs_hwmon_remove(struct ufs_hba *hba) {}
|
|
static inline void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask) {}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PM
|
|
extern int ufshcd_runtime_suspend(struct device *dev);
|
|
extern int ufshcd_runtime_resume(struct device *dev);
|
|
#endif
|
|
#ifdef CONFIG_PM_SLEEP
|
|
extern int ufshcd_system_suspend(struct device *dev);
|
|
extern int ufshcd_system_resume(struct device *dev);
|
|
#endif
|
|
extern int ufshcd_shutdown(struct ufs_hba *hba);
|
|
extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
|
|
int agreed_gear,
|
|
int adapt_val);
|
|
extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
u8 attr_set, u32 mib_val, u8 peer);
|
|
extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 *mib_val, u8 peer);
|
|
extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
|
|
struct ufs_pa_layer_attr *desired_pwr_mode);
|
|
|
|
/* UIC command interfaces for DME primitives */
|
|
#define DME_LOCAL 0
|
|
#define DME_PEER 1
|
|
#define ATTR_SET_NOR 0 /* NORMAL */
|
|
#define ATTR_SET_ST 1 /* STATIC */
|
|
|
|
static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
mib_val, DME_PEER);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
u32 mib_val)
|
|
{
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
mib_val, DME_PEER);
|
|
}
|
|
|
|
static inline int ufshcd_dme_get(struct ufs_hba *hba,
|
|
u32 attr_sel, u32 *mib_val)
|
|
{
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
|
|
}
|
|
|
|
static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
|
|
u32 attr_sel, u32 *mib_val)
|
|
{
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
|
|
}
|
|
|
|
static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
|
|
{
|
|
return (pwr_info->pwr_rx == FAST_MODE ||
|
|
pwr_info->pwr_rx == FASTAUTO_MODE) &&
|
|
(pwr_info->pwr_tx == FAST_MODE ||
|
|
pwr_info->pwr_tx == FASTAUTO_MODE);
|
|
}
|
|
|
|
static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
|
|
{
|
|
return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
|
|
}
|
|
|
|
/* Expose Query-Request API */
|
|
int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
|
|
enum query_opcode opcode,
|
|
enum desc_idn idn, u8 index,
|
|
u8 selector,
|
|
u8 *desc_buf, int *buf_len);
|
|
int ufshcd_read_desc_param(struct ufs_hba *hba,
|
|
enum desc_idn desc_id,
|
|
int desc_index,
|
|
u8 param_offset,
|
|
u8 *param_read_buf,
|
|
u8 param_size);
|
|
int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode,
|
|
enum attr_idn idn, u8 index, u8 selector,
|
|
u32 *attr_val);
|
|
int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
|
|
enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
|
|
int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
|
|
enum flag_idn idn, u8 index, bool *flag_res);
|
|
|
|
void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
|
|
void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
|
|
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
|
|
#define SD_ASCII_STD true
|
|
#define SD_RAW false
|
|
int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
|
|
u8 **buf, bool ascii);
|
|
|
|
int ufshcd_hold(struct ufs_hba *hba, bool async);
|
|
void ufshcd_release(struct ufs_hba *hba);
|
|
|
|
void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
|
|
int *desc_length);
|
|
|
|
u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
|
|
|
|
int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
|
|
|
|
int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
|
|
struct utp_upiu_req *req_upiu,
|
|
struct utp_upiu_req *rsp_upiu,
|
|
int msgcode,
|
|
u8 *desc_buff, int *buff_len,
|
|
enum query_opcode desc_op);
|
|
|
|
int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
|
|
int ufshcd_suspend_prepare(struct device *dev);
|
|
int __ufshcd_suspend_prepare(struct device *dev, bool rpm_ok_for_spm);
|
|
void ufshcd_resume_complete(struct device *dev);
|
|
|
|
/* Wrapper functions for safely calling variant operations */
|
|
static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops)
|
|
return hba->vops->name;
|
|
return "";
|
|
}
|
|
|
|
static inline int ufshcd_vops_init(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->init)
|
|
return hba->vops->init(hba);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline void ufshcd_vops_exit(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->exit)
|
|
return hba->vops->exit(hba);
|
|
}
|
|
|
|
static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->get_ufs_hci_version)
|
|
return hba->vops->get_ufs_hci_version(hba);
|
|
|
|
return ufshcd_readl(hba, REG_UFS_VERSION);
|
|
}
|
|
|
|
static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
|
|
bool up, enum ufs_notify_change_status status)
|
|
{
|
|
if (hba->vops && hba->vops->clk_scale_notify)
|
|
return hba->vops->clk_scale_notify(hba, up, status);
|
|
return 0;
|
|
}
|
|
|
|
static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
|
|
enum ufs_event_type evt,
|
|
void *data)
|
|
{
|
|
if (hba->vops && hba->vops->event_notify)
|
|
hba->vops->event_notify(hba, evt, data);
|
|
}
|
|
|
|
static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
|
|
enum ufs_notify_change_status status)
|
|
{
|
|
if (hba->vops && hba->vops->setup_clocks)
|
|
return hba->vops->setup_clocks(hba, on, status);
|
|
return 0;
|
|
}
|
|
|
|
static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
|
|
bool status)
|
|
{
|
|
if (hba->vops && hba->vops->hce_enable_notify)
|
|
return hba->vops->hce_enable_notify(hba, status);
|
|
|
|
return 0;
|
|
}
|
|
static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
|
|
bool status)
|
|
{
|
|
if (hba->vops && hba->vops->link_startup_notify)
|
|
return hba->vops->link_startup_notify(hba, status);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->phy_initialization)
|
|
return hba->vops->phy_initialization(hba);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
|
|
enum ufs_notify_change_status status,
|
|
struct ufs_pa_layer_attr *dev_max_params,
|
|
struct ufs_pa_layer_attr *dev_req_params)
|
|
{
|
|
if (hba->vops && hba->vops->pwr_change_notify)
|
|
return hba->vops->pwr_change_notify(hba, status,
|
|
dev_max_params, dev_req_params);
|
|
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
|
|
int tag, u8 tm_function)
|
|
{
|
|
if (hba->vops && hba->vops->setup_task_mgmt)
|
|
return hba->vops->setup_task_mgmt(hba, tag, tm_function);
|
|
}
|
|
|
|
static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
|
|
enum uic_cmd_dme cmd,
|
|
enum ufs_notify_change_status status)
|
|
{
|
|
if (hba->vops && hba->vops->hibern8_notify)
|
|
return hba->vops->hibern8_notify(hba, cmd, status);
|
|
}
|
|
|
|
static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->apply_dev_quirks)
|
|
return hba->vops->apply_dev_quirks(hba);
|
|
return 0;
|
|
}
|
|
|
|
static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->fixup_dev_quirks)
|
|
hba->vops->fixup_dev_quirks(hba);
|
|
}
|
|
|
|
static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op,
|
|
enum ufs_notify_change_status status)
|
|
{
|
|
if (hba->vops && hba->vops->suspend)
|
|
return hba->vops->suspend(hba, op, status);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
|
|
{
|
|
if (hba->vops && hba->vops->resume)
|
|
return hba->vops->resume(hba, op);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->dbg_register_dump)
|
|
hba->vops->dbg_register_dump(hba);
|
|
}
|
|
|
|
static inline int ufshcd_vops_device_reset(struct ufs_hba *hba)
|
|
{
|
|
if (hba->vops && hba->vops->device_reset)
|
|
return hba->vops->device_reset(hba);
|
|
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
|
|
struct devfreq_dev_profile
|
|
*profile, void *data)
|
|
{
|
|
if (hba->vops && hba->vops->config_scaling_param)
|
|
hba->vops->config_scaling_param(hba, profile, data);
|
|
}
|
|
|
|
extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
|
|
|
|
/*
|
|
* ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
|
|
* @scsi_lun: scsi LUN id
|
|
*
|
|
* Returns UPIU LUN id
|
|
*/
|
|
static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
|
|
{
|
|
if (scsi_is_wlun(scsi_lun))
|
|
return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
|
|
| UFS_UPIU_WLUN_ID;
|
|
else
|
|
return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
|
|
}
|
|
|
|
int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
|
|
const char *prefix);
|
|
|
|
int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
|
|
int ufshcd_write_ee_control(struct ufs_hba *hba);
|
|
int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
|
|
u16 set, u16 clr);
|
|
|
|
static inline int ufshcd_update_ee_drv_mask(struct ufs_hba *hba,
|
|
u16 set, u16 clr)
|
|
{
|
|
return ufshcd_update_ee_control(hba, &hba->ee_drv_mask,
|
|
&hba->ee_usr_mask, set, clr);
|
|
}
|
|
|
|
static inline int ufshcd_update_ee_usr_mask(struct ufs_hba *hba,
|
|
u16 set, u16 clr)
|
|
{
|
|
return ufshcd_update_ee_control(hba, &hba->ee_usr_mask,
|
|
&hba->ee_drv_mask, set, clr);
|
|
}
|
|
|
|
static inline int ufshcd_rpm_get_sync(struct ufs_hba *hba)
|
|
{
|
|
return pm_runtime_get_sync(&hba->sdev_ufs_device->sdev_gendev);
|
|
}
|
|
|
|
static inline int ufshcd_rpm_put_sync(struct ufs_hba *hba)
|
|
{
|
|
return pm_runtime_put_sync(&hba->sdev_ufs_device->sdev_gendev);
|
|
}
|
|
|
|
static inline void ufshcd_rpm_get_noresume(struct ufs_hba *hba)
|
|
{
|
|
pm_runtime_get_noresume(&hba->sdev_ufs_device->sdev_gendev);
|
|
}
|
|
|
|
static inline int ufshcd_rpm_resume(struct ufs_hba *hba)
|
|
{
|
|
return pm_runtime_resume(&hba->sdev_ufs_device->sdev_gendev);
|
|
}
|
|
|
|
static inline int ufshcd_rpm_put(struct ufs_hba *hba)
|
|
{
|
|
return pm_runtime_put(&hba->sdev_ufs_device->sdev_gendev);
|
|
}
|
|
|
|
#endif /* End of Header */
|