279 lines
6.2 KiB
C
279 lines
6.2 KiB
C
/*
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <linux/gpio.h>
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#include <mach/iomux-mx27.h>
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#include <linux/i2c/pca953x.h>
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#include "devices-imx27.h"
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static const int mxt_td60_pins[] __initconst = {
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/* UART0 */
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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/* UART1 */
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PE3_PF_UART2_CTS,
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PE4_PF_UART2_RTS,
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PE6_PF_UART2_TXD,
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PE7_PF_UART2_RXD,
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/* UART2 */
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PE8_PF_UART3_TXD,
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PE9_PF_UART3_RXD,
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PE10_PF_UART3_CTS,
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PE11_PF_UART3_RTS,
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/* FEC */
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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PD2_AIN_FEC_TXD2,
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PD3_AIN_FEC_TXD3,
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PD4_AOUT_FEC_RX_ER,
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PD5_AOUT_FEC_RXD1,
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PD6_AOUT_FEC_RXD2,
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PD7_AOUT_FEC_RXD3,
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PD8_AF_FEC_MDIO,
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PD9_AIN_FEC_MDC,
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PD10_AOUT_FEC_CRS,
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PD11_AOUT_FEC_TX_CLK,
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PD12_AOUT_FEC_RXD0,
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PD13_AOUT_FEC_RX_DV,
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PD14_AOUT_FEC_RX_CLK,
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PD15_AOUT_FEC_COL,
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PD16_AIN_FEC_TX_ER,
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PF23_AIN_FEC_TX_EN,
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/* I2C1 */
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PD17_PF_I2C_DATA,
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PD18_PF_I2C_CLK,
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/* I2C2 */
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PC5_PF_I2C2_SDA,
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PC6_PF_I2C2_SCL,
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/* FB */
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PA5_PF_LSCLK,
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PA6_PF_LD0,
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PA7_PF_LD1,
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PA8_PF_LD2,
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PA9_PF_LD3,
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PA10_PF_LD4,
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PA11_PF_LD5,
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PA12_PF_LD6,
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PA13_PF_LD7,
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PA14_PF_LD8,
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PA15_PF_LD9,
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PA16_PF_LD10,
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PA17_PF_LD11,
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PA18_PF_LD12,
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PA19_PF_LD13,
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PA20_PF_LD14,
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PA21_PF_LD15,
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PA22_PF_LD16,
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PA23_PF_LD17,
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PA25_PF_CLS,
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PA27_PF_SPL_SPR,
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PA28_PF_HSYNC,
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PA29_PF_VSYNC,
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PA30_PF_CONTRAST,
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PA31_PF_OE_ACD,
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/* OWIRE */
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PE16_AF_OWIRE,
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/* SDHC1*/
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PE18_PF_SD1_D0,
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PE19_PF_SD1_D1,
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PE20_PF_SD1_D2,
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PE21_PF_SD1_D3,
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PE22_PF_SD1_CMD,
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PE23_PF_SD1_CLK,
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PF8_AF_ATA_IORDY,
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/* SDHC2*/
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PB4_PF_SD2_D0,
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PB5_PF_SD2_D1,
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PB6_PF_SD2_D2,
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PB7_PF_SD2_D3,
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PB8_PF_SD2_CMD,
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PB9_PF_SD2_CLK,
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};
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static const struct mxc_nand_platform_data
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mxt_td60_nand_board_info __initconst = {
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.width = 1,
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.hw_ecc = 1,
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};
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static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
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.bitrate = 100000,
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};
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/* PCA9557 */
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static int mxt_td60_pca9557_setup(struct i2c_client *client,
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unsigned gpio_base, unsigned ngpio,
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void *context)
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{
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static int mxt_td60_gpio_value[] = {
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-1, -1, -1, -1, -1, -1, -1, 1
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};
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int n;
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for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
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gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
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if (mxt_td60_gpio_value[n] < 0)
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gpio_direction_input(gpio_base + n);
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else
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gpio_direction_output(gpio_base + n,
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mxt_td60_gpio_value[n]);
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gpio_export(gpio_base + n, 0);
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}
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return 0;
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}
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static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
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.gpio_base = 240, /* place PCA9557 after all MX27 gpio pins */
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.invert = 0, /* Do not invert */
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.setup = mxt_td60_pca9557_setup,
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};
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static struct i2c_board_info mxt_td60_i2c_devices[] = {
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{
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I2C_BOARD_INFO("pca9557", 0x18),
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.platform_data = &mxt_td60_pca9557_pdata,
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},
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};
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static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
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.bitrate = 100000,
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};
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static struct i2c_board_info mxt_td60_i2c2_devices[] = {
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};
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static struct imx_fb_videomode mxt_td60_modes[] = {
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{
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.mode = {
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.name = "Chimei LW700AT9003",
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.refresh = 60,
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.xres = 800,
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.yres = 480,
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.pixclock = 30303,
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.hsync_len = 64,
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.left_margin = 0x67,
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.right_margin = 0x68,
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.vsync_len = 16,
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.upper_margin = 0x0f,
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.lower_margin = 0x0f,
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},
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.bpp = 16,
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.pcr = 0xFA208B83,
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},
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};
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static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
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.mode = mxt_td60_modes,
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.num_modes = ARRAY_SIZE(mxt_td60_modes),
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/*
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* - HSYNC active high
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* - VSYNC active high
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* - clk notenabled while idle
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* - clock inverted
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* - data not inverted
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* - data enable low active
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* - enable sharp mode
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*/
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.pwmr = 0x00A903FF,
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.lscr1 = 0x00120300,
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.dmacr = 0x00020010,
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};
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static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
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void *data)
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{
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return request_irq(gpio_to_irq(IMX_GPIO_NR(6, 8)), detect_irq,
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IRQF_TRIGGER_FALLING, "sdhc1-card-detect", data);
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}
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static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(gpio_to_irq(IMX_GPIO_NR(6, 8)), data);
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}
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static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
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.init = mxt_td60_sdhc1_init,
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.exit = mxt_td60_sdhc1_exit,
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};
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static const struct imxuart_platform_data uart_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static void __init mxt_td60_board_init(void)
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{
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imx27_soc_init();
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mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
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"MXT_TD60");
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imx27_add_imx_uart0(&uart_pdata);
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imx27_add_imx_uart1(&uart_pdata);
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imx27_add_imx_uart2(&uart_pdata);
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imx27_add_mxc_nand(&mxt_td60_nand_board_info);
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i2c_register_board_info(0, mxt_td60_i2c_devices,
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ARRAY_SIZE(mxt_td60_i2c_devices));
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i2c_register_board_info(1, mxt_td60_i2c2_devices,
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ARRAY_SIZE(mxt_td60_i2c2_devices));
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imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
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imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
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imx27_add_imx_fb(&mxt_td60_fb_data);
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imx27_add_mxc_mmc(0, &sdhc1_pdata);
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imx27_add_fec(NULL);
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}
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static void __init mxt_td60_timer_init(void)
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{
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mx27_clocks_init(26000000);
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}
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static struct sys_timer mxt_td60_timer = {
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.init = mxt_td60_timer_init,
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};
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MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
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/* maintainer: Maxtrack Industrial */
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.atag_offset = 0x100,
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.map_io = mx27_map_io,
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.init_early = imx27_init_early,
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.init_irq = mx27_init_irq,
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.handle_irq = imx27_handle_irq,
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.timer = &mxt_td60_timer,
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.init_machine = mxt_td60_board_init,
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.restart = mxc_restart,
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MACHINE_END
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