Mika Kuoppala f02ac414ba Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" ... This reverts commit 62037ffff2. L3 ro cache invalidation is part of the dword0 of pipe control. Also it is not relevant to this gen. Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200506144734.29297-1-mika.kuoppala@linux.intel.com		2020-05-07 07:44:40 +01:00
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drm	Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"	2020-05-07 07:44:40 +01:00
host1x	drm/tegra: Fixes for v5.6-rc1	2020-02-07 12:22:30 +10:00
ipu-v3	…
trace	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00
vga	…
Makefile	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00