Niklas Cassel 74583f1b92 riscv: dts: k210: fix broken IRQs on hart1 ... Commit 67d96729a9 ("riscv: Update Canaan Kendryte K210 device tree") incorrectly removed two entries from the PLIC interrupt-controller node's interrupts-extended property. The PLIC driver cannot know the mapping between hart contexts and hart ids, so this information has to be provided by device tree, as specified by the PLIC device tree binding. The PLIC driver uses the interrupts-extended property, and initializes the hart context registers in the exact same order as provided by the interrupts-extended property. In other words, if we don't specify the S-mode interrupts, the PLIC driver will simply initialize the hart0 S-mode hart context with the hart1 M-mode configuration. It is therefore essential to specify the S-mode IRQs even though the system itself will only ever be running in M-mode. Re-add the S-mode interrupts, so that we get working IRQs on hart1 again. Cc: <stable@vger.kernel.org> Fixes: 67d96729a9 ("riscv: Update Canaan Kendryte K210 device tree") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2022-03-03 20:04:21 -08:00
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dts	riscv: dts: k210: fix broken IRQs on hart1	2022-03-03 20:04:21 -08:00
.gitignore	riscv: Ignore Image.* and loader.bin	2020-11-09 11:54:46 -08:00
Makefile	riscv: move the (z)install rules to arch/riscv/Makefile	2021-09-10 23:08:26 -07:00
install.sh	RISC-V: Build flat and compressed kernel images	2018-11-20 05:19:09 -08:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00