657 lines
15 KiB
C
657 lines
15 KiB
C
#undef DEBUG
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/*
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* ARM performance counter support.
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*
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* Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
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* Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
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*
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* This code is based on the sparc64 perf event code, which is in turn based
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* on the x86 code. Callchain code is based on the ARM OProfile backtrace
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* code.
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/uaccess.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <asm/irq_regs.h>
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#include <asm/pmu.h>
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#include <asm/stacktrace.h>
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static int
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armpmu_map_cache_event(const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u64 config)
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{
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unsigned int cache_type, cache_op, cache_result, ret;
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cache_type = (config >> 0) & 0xff;
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if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
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return -EINVAL;
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cache_op = (config >> 8) & 0xff;
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if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
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return -EINVAL;
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cache_result = (config >> 16) & 0xff;
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if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
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return -EINVAL;
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ret = (int)(*cache_map)[cache_type][cache_op][cache_result];
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if (ret == CACHE_OP_UNSUPPORTED)
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return -ENOENT;
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return ret;
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}
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static int
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armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
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{
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int mapping;
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if (config >= PERF_COUNT_HW_MAX)
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return -EINVAL;
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mapping = (*event_map)[config];
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return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
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}
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static int
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armpmu_map_raw_event(u32 raw_event_mask, u64 config)
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{
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return (int)(config & raw_event_mask);
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}
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int
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armpmu_map_event(struct perf_event *event,
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const unsigned (*event_map)[PERF_COUNT_HW_MAX],
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const unsigned (*cache_map)
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX],
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u32 raw_event_mask)
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{
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u64 config = event->attr.config;
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switch (event->attr.type) {
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case PERF_TYPE_HARDWARE:
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return armpmu_map_hw_event(event_map, config);
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case PERF_TYPE_HW_CACHE:
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return armpmu_map_cache_event(cache_map, config);
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case PERF_TYPE_RAW:
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return armpmu_map_raw_event(raw_event_mask, config);
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}
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return -ENOENT;
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}
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int armpmu_event_set_period(struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct hw_perf_event *hwc = &event->hw;
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s64 left = local64_read(&hwc->period_left);
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s64 period = hwc->sample_period;
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int ret = 0;
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if (unlikely(left <= -period)) {
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left = period;
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (left > (s64)armpmu->max_period)
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left = armpmu->max_period;
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local64_set(&hwc->prev_count, (u64)-left);
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armpmu->write_counter(event, (u64)(-left) & 0xffffffff);
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perf_event_update_userpage(event);
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return ret;
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}
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u64 armpmu_event_update(struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct hw_perf_event *hwc = &event->hw;
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u64 delta, prev_raw_count, new_raw_count;
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again:
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prev_raw_count = local64_read(&hwc->prev_count);
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new_raw_count = armpmu->read_counter(event);
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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goto again;
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delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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return new_raw_count;
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}
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static void
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armpmu_read(struct perf_event *event)
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{
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armpmu_event_update(event);
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}
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static void
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armpmu_stop(struct perf_event *event, int flags)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct hw_perf_event *hwc = &event->hw;
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/*
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* ARM pmu always has to update the counter, so ignore
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* PERF_EF_UPDATE, see comments in armpmu_start().
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*/
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if (!(hwc->state & PERF_HES_STOPPED)) {
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armpmu->disable(event);
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armpmu_event_update(event);
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hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
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}
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}
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static void armpmu_start(struct perf_event *event, int flags)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct hw_perf_event *hwc = &event->hw;
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/*
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* ARM pmu always has to reprogram the period, so ignore
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* PERF_EF_RELOAD, see the comment below.
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*/
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if (flags & PERF_EF_RELOAD)
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WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
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hwc->state = 0;
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/*
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* Set the period again. Some counters can't be stopped, so when we
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* were stopped we simply disabled the IRQ source and the counter
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* may have been left counting. If we don't do this step then we may
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* get an interrupt too soon or *way* too late if the overflow has
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* happened since disabling.
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*/
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armpmu_event_set_period(event);
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armpmu->enable(event);
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}
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static void
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armpmu_del(struct perf_event *event, int flags)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct pmu_hw_events *hw_events = armpmu->get_hw_events();
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struct hw_perf_event *hwc = &event->hw;
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int idx = hwc->idx;
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armpmu_stop(event, PERF_EF_UPDATE);
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hw_events->events[idx] = NULL;
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clear_bit(idx, hw_events->used_mask);
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if (armpmu->clear_event_idx)
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armpmu->clear_event_idx(hw_events, event);
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perf_event_update_userpage(event);
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}
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static int
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armpmu_add(struct perf_event *event, int flags)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct pmu_hw_events *hw_events = armpmu->get_hw_events();
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struct hw_perf_event *hwc = &event->hw;
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int idx;
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int err = 0;
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perf_pmu_disable(event->pmu);
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/* If we don't have a space for the counter then finish early. */
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idx = armpmu->get_event_idx(hw_events, event);
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if (idx < 0) {
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err = idx;
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goto out;
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}
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/*
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* If there is an event in the counter we are going to use then make
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* sure it is disabled.
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*/
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event->hw.idx = idx;
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armpmu->disable(event);
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hw_events->events[idx] = event;
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hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
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if (flags & PERF_EF_START)
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armpmu_start(event, PERF_EF_RELOAD);
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/* Propagate our changes to the userspace mapping. */
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perf_event_update_userpage(event);
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out:
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perf_pmu_enable(event->pmu);
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return err;
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}
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static int
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validate_event(struct pmu_hw_events *hw_events,
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struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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if (is_software_event(event))
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return 1;
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if (event->state < PERF_EVENT_STATE_OFF)
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return 1;
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if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
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return 1;
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return armpmu->get_event_idx(hw_events, event) >= 0;
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}
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static int
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validate_group(struct perf_event *event)
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{
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struct perf_event *sibling, *leader = event->group_leader;
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struct pmu_hw_events fake_pmu;
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DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
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/*
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* Initialise the fake PMU. We only need to populate the
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* used_mask for the purposes of validation.
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*/
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memset(fake_used_mask, 0, sizeof(fake_used_mask));
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fake_pmu.used_mask = fake_used_mask;
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if (!validate_event(&fake_pmu, leader))
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return -EINVAL;
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list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
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if (!validate_event(&fake_pmu, sibling))
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return -EINVAL;
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}
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if (!validate_event(&fake_pmu, event))
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return -EINVAL;
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return 0;
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}
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static irqreturn_t armpmu_dispatch_irq(int irq, void *dev)
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{
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struct arm_pmu *armpmu;
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struct platform_device *plat_device;
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struct arm_pmu_platdata *plat;
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int ret;
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u64 start_clock, finish_clock;
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if (irq_is_percpu(irq))
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dev = *(void **)dev;
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armpmu = dev;
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plat_device = armpmu->plat_device;
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plat = dev_get_platdata(&plat_device->dev);
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start_clock = sched_clock();
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if (plat && plat->handle_irq)
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ret = plat->handle_irq(irq, dev, armpmu->handle_irq);
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else
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ret = armpmu->handle_irq(irq, dev);
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finish_clock = sched_clock();
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perf_sample_event_took(finish_clock - start_clock);
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return ret;
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}
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static void
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armpmu_release_hardware(struct arm_pmu *armpmu)
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{
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armpmu->free_irq(armpmu);
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pm_runtime_put_sync(&armpmu->plat_device->dev);
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}
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static int
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armpmu_reserve_hardware(struct arm_pmu *armpmu)
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{
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int err;
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struct platform_device *pmu_device = armpmu->plat_device;
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if (!pmu_device)
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return -ENODEV;
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pm_runtime_get_sync(&pmu_device->dev);
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err = armpmu->request_irq(armpmu, armpmu_dispatch_irq);
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if (err) {
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armpmu_release_hardware(armpmu);
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return err;
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}
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return 0;
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}
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static void
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hw_perf_event_destroy(struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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atomic_t *active_events = &armpmu->active_events;
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struct mutex *pmu_reserve_mutex = &armpmu->reserve_mutex;
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if (atomic_dec_and_mutex_lock(active_events, pmu_reserve_mutex)) {
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armpmu_release_hardware(armpmu);
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mutex_unlock(pmu_reserve_mutex);
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}
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}
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static int
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event_requires_mode_exclusion(struct perf_event_attr *attr)
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{
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return attr->exclude_idle || attr->exclude_user ||
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attr->exclude_kernel || attr->exclude_hv;
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}
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static int
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__hw_perf_event_init(struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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struct hw_perf_event *hwc = &event->hw;
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int mapping;
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mapping = armpmu->map_event(event);
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if (mapping < 0) {
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pr_debug("event %x:%llx not supported\n", event->attr.type,
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event->attr.config);
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return mapping;
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}
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/*
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* We don't assign an index until we actually place the event onto
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* hardware. Use -1 to signify that we haven't decided where to put it
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* yet. For SMP systems, each core has it's own PMU so we can't do any
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* clever allocation or constraints checking at this point.
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*/
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hwc->idx = -1;
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hwc->config_base = 0;
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hwc->config = 0;
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hwc->event_base = 0;
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/*
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* Check whether we need to exclude the counter from certain modes.
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*/
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if ((!armpmu->set_event_filter ||
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armpmu->set_event_filter(hwc, &event->attr)) &&
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event_requires_mode_exclusion(&event->attr)) {
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pr_debug("ARM performance counters do not support "
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"mode exclusion\n");
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return -EOPNOTSUPP;
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}
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/*
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* Store the event encoding into the config_base field.
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*/
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hwc->config_base |= (unsigned long)mapping;
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if (!hwc->sample_period) {
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/*
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* For non-sampling runs, limit the sample_period to half
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* of the counter width. That way, the new counter value
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* is far less likely to overtake the previous one unless
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* you have some serious IRQ latency issues.
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*/
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hwc->sample_period = armpmu->max_period >> 1;
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hwc->last_period = hwc->sample_period;
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local64_set(&hwc->period_left, hwc->sample_period);
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}
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if (event->group_leader != event) {
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if (validate_group(event) != 0)
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return -EINVAL;
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}
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return 0;
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}
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static int armpmu_event_init(struct perf_event *event)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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int err = 0;
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atomic_t *active_events = &armpmu->active_events;
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/* does not support taken branch sampling */
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if (has_branch_stack(event))
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return -EOPNOTSUPP;
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if (armpmu->map_event(event) == -ENOENT)
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return -ENOENT;
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event->destroy = hw_perf_event_destroy;
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if (!atomic_inc_not_zero(active_events)) {
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mutex_lock(&armpmu->reserve_mutex);
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if (atomic_read(active_events) == 0)
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err = armpmu_reserve_hardware(armpmu);
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if (!err)
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atomic_inc(active_events);
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mutex_unlock(&armpmu->reserve_mutex);
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}
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if (err)
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return err;
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err = __hw_perf_event_init(event);
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if (err)
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hw_perf_event_destroy(event);
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return err;
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}
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static void armpmu_enable(struct pmu *pmu)
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{
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struct arm_pmu *armpmu = to_arm_pmu(pmu);
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struct pmu_hw_events *hw_events = armpmu->get_hw_events();
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int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);
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if (enabled)
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armpmu->start(armpmu);
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}
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static void armpmu_disable(struct pmu *pmu)
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{
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struct arm_pmu *armpmu = to_arm_pmu(pmu);
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armpmu->stop(armpmu);
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}
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#ifdef CONFIG_PM_RUNTIME
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static int armpmu_runtime_resume(struct device *dev)
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{
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struct arm_pmu_platdata *plat = dev_get_platdata(dev);
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if (plat && plat->runtime_resume)
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return plat->runtime_resume(dev);
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return 0;
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}
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static int armpmu_runtime_suspend(struct device *dev)
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{
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struct arm_pmu_platdata *plat = dev_get_platdata(dev);
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if (plat && plat->runtime_suspend)
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return plat->runtime_suspend(dev);
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return 0;
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}
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#endif
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const struct dev_pm_ops armpmu_dev_pm_ops = {
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SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
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};
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static void armpmu_init(struct arm_pmu *armpmu)
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{
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atomic_set(&armpmu->active_events, 0);
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mutex_init(&armpmu->reserve_mutex);
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armpmu->pmu = (struct pmu) {
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.pmu_enable = armpmu_enable,
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.pmu_disable = armpmu_disable,
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.event_init = armpmu_event_init,
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.add = armpmu_add,
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.del = armpmu_del,
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.start = armpmu_start,
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.stop = armpmu_stop,
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.read = armpmu_read,
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};
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}
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int armpmu_register(struct arm_pmu *armpmu, int type)
|
|
{
|
|
armpmu_init(armpmu);
|
|
pm_runtime_enable(&armpmu->plat_device->dev);
|
|
pr_info("enabled with %s PMU driver, %d counters available\n",
|
|
armpmu->name, armpmu->num_events);
|
|
return perf_pmu_register(&armpmu->pmu, armpmu->name, type);
|
|
}
|
|
|
|
/*
|
|
* Callchain handling code.
|
|
*/
|
|
|
|
/*
|
|
* The registers we're interested in are at the end of the variable
|
|
* length saved register structure. The fp points at the end of this
|
|
* structure so the address of this struct is:
|
|
* (struct frame_tail *)(xxx->fp)-1
|
|
*
|
|
* This code has been adapted from the ARM OProfile support.
|
|
*/
|
|
struct frame_tail {
|
|
struct frame_tail __user *fp;
|
|
unsigned long sp;
|
|
unsigned long lr;
|
|
} __attribute__((packed));
|
|
|
|
/*
|
|
* Get the return address for a single stackframe and return a pointer to the
|
|
* next frame tail.
|
|
*/
|
|
static struct frame_tail __user *
|
|
user_backtrace(struct frame_tail __user *tail,
|
|
struct perf_callchain_entry *entry)
|
|
{
|
|
struct frame_tail buftail;
|
|
|
|
/* Also check accessibility of one struct frame_tail beyond */
|
|
if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
|
|
return NULL;
|
|
if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail)))
|
|
return NULL;
|
|
|
|
perf_callchain_store(entry, buftail.lr);
|
|
|
|
/*
|
|
* Frame pointers should strictly progress back up the stack
|
|
* (towards higher addresses).
|
|
*/
|
|
if (tail + 1 >= buftail.fp)
|
|
return NULL;
|
|
|
|
return buftail.fp - 1;
|
|
}
|
|
|
|
void
|
|
perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
|
{
|
|
struct frame_tail __user *tail;
|
|
|
|
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
|
|
/* We don't support guest os callchain now */
|
|
return;
|
|
}
|
|
|
|
perf_callchain_store(entry, regs->ARM_pc);
|
|
tail = (struct frame_tail __user *)regs->ARM_fp - 1;
|
|
|
|
while ((entry->nr < PERF_MAX_STACK_DEPTH) &&
|
|
tail && !((unsigned long)tail & 0x3))
|
|
tail = user_backtrace(tail, entry);
|
|
}
|
|
|
|
/*
|
|
* Gets called by walk_stackframe() for every stackframe. This will be called
|
|
* whist unwinding the stackframe and is like a subroutine return so we use
|
|
* the PC.
|
|
*/
|
|
static int
|
|
callchain_trace(struct stackframe *fr,
|
|
void *data)
|
|
{
|
|
struct perf_callchain_entry *entry = data;
|
|
perf_callchain_store(entry, fr->pc);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
|
{
|
|
struct stackframe fr;
|
|
|
|
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
|
|
/* We don't support guest os callchain now */
|
|
return;
|
|
}
|
|
|
|
fr.fp = regs->ARM_fp;
|
|
fr.sp = regs->ARM_sp;
|
|
fr.lr = regs->ARM_lr;
|
|
fr.pc = regs->ARM_pc;
|
|
walk_stackframe(&fr, callchain_trace, entry);
|
|
}
|
|
|
|
unsigned long perf_instruction_pointer(struct pt_regs *regs)
|
|
{
|
|
if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
|
|
return perf_guest_cbs->get_guest_ip();
|
|
|
|
return instruction_pointer(regs);
|
|
}
|
|
|
|
unsigned long perf_misc_flags(struct pt_regs *regs)
|
|
{
|
|
int misc = 0;
|
|
|
|
if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) {
|
|
if (perf_guest_cbs->is_user_mode())
|
|
misc |= PERF_RECORD_MISC_GUEST_USER;
|
|
else
|
|
misc |= PERF_RECORD_MISC_GUEST_KERNEL;
|
|
} else {
|
|
if (user_mode(regs))
|
|
misc |= PERF_RECORD_MISC_USER;
|
|
else
|
|
misc |= PERF_RECORD_MISC_KERNEL;
|
|
}
|
|
|
|
return misc;
|
|
}
|