397 lines
9.8 KiB
C
397 lines
9.8 KiB
C
/*
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* linux/arch/i386/kernel/time.c
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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*
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* This file contains the PC-specific time handling details:
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* reading the RTC at bootup, etc..
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* 1994-07-02 Alan Modra
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* fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
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* 1995-03-26 Markus Kuhn
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* fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
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* precision CMOS clock update
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* 1996-05-03 Ingo Molnar
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* fixed time warps in do_[slow|fast]_gettimeoffset()
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* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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* 1998-09-05 (Various)
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* More robust do_fast_gettimeoffset() algorithm implemented
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* (works with APM, Cyrix 6x86MX and Centaur C6),
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* monotonic gettimeofday() with fast_get_timeoffset(),
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* drift-proof precision TSC calibration on boot
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* (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
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* Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
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* ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
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* 1998-12-16 Andrea Arcangeli
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* Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
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* because was not accounting lost_ticks.
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* 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
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* Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
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* serialize accesses to xtime/lost_ticks).
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/bcd.h>
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#include <linux/efi.h>
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#include <linux/mca.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/irq.h>
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#include <asm/msr.h>
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#include <asm/delay.h>
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#include <asm/mpspec.h>
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#include <asm/uaccess.h>
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#include <asm/processor.h>
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#include <asm/timer.h>
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#include "mach_time.h"
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#include <linux/timex.h>
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#include <asm/hpet.h>
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#include <asm/arch_hooks.h>
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#include "io_ports.h"
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#include <asm/i8259.h>
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int pit_latch_buggy; /* extern */
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#include "do_timer.h"
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unsigned int cpu_khz; /* Detected as we calibrate the TSC */
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EXPORT_SYMBOL(cpu_khz);
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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/*
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* This is a special lock that is owned by the CPU and holds the index
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* register we are working with. It is required for NMI access to the
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* CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
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*/
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volatile unsigned long cmos_lock = 0;
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EXPORT_SYMBOL(cmos_lock);
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/* Routines for accessing the CMOS RAM/RTC. */
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unsigned char rtc_cmos_read(unsigned char addr)
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{
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unsigned char val;
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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val = inb_p(RTC_PORT(1));
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lock_cmos_suffix(addr);
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return val;
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}
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EXPORT_SYMBOL(rtc_cmos_read);
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void rtc_cmos_write(unsigned char val, unsigned char addr)
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{
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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outb_p(val, RTC_PORT(1));
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lock_cmos_suffix(addr);
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}
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EXPORT_SYMBOL(rtc_cmos_write);
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static int set_rtc_mmss(unsigned long nowtime)
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{
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int retval;
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unsigned long flags;
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/* gets recalled with irq locally disabled */
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/* XXX - does irqsave resolve this? -johnstul */
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spin_lock_irqsave(&rtc_lock, flags);
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if (efi_enabled)
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retval = efi_set_rtc_mmss(nowtime);
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else
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retval = mach_set_rtc_mmss(nowtime);
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spin_unlock_irqrestore(&rtc_lock, flags);
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return retval;
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}
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int timer_ack;
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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#ifdef CONFIG_SMP
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if (!user_mode_vm(regs) && in_lock_functions(pc)) {
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#ifdef CONFIG_FRAME_POINTER
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return *(unsigned long *)(regs->ebp + 4);
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#else
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unsigned long *sp;
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if ((regs->xcs & 3) == 0)
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sp = (unsigned long *)®s->esp;
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else
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sp = (unsigned long *)regs->esp;
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/* Return address is either directly at stack pointer
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or above a saved eflags. Eflags has bits 22-31 zero,
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kernel addresses don't. */
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if (sp[0] >> 22)
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return sp[0];
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if (sp[1] >> 22)
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return sp[1];
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#endif
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}
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#endif
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* This is the same as the above, except we _also_ save the current
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* Time Stamp Counter value at the time of the timer interrupt, so that
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* we later on can estimate the time of day more exactly.
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*/
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irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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/*
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* Here we are in the timer irq handler. We just have irqs locally
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* disabled but we don't know if the timer_bh is running on the other
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* CPU. We need to avoid to SMP race with it. NOTE: we don' t need
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* the irq version of write_lock because as just said we have irq
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* locally disabled. -arca
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*/
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write_seqlock(&xtime_lock);
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#ifdef CONFIG_X86_IO_APIC
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if (timer_ack) {
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/*
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* Subtle, when I/O APICs are used we have to ack timer IRQ
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* manually to reset the IRR bit for do_slow_gettimeoffset().
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* This will also deassert NMI lines for the watchdog if run
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* on an 82489DX-based system.
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*/
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spin_lock(&i8259A_lock);
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outb(0x0c, PIC_MASTER_OCW3);
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/* Ack the IRQ; AEOI will end it automatically. */
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inb(PIC_MASTER_POLL);
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spin_unlock(&i8259A_lock);
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}
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#endif
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do_timer_interrupt_hook();
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if (MCA_bus) {
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/* The PS/2 uses level-triggered interrupts. You can't
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turn them off, nor would you want to (any attempt to
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enable edge-triggered interrupts usually gets intercepted by a
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special hardware circuit). Hence we have to acknowledge
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the timer interrupt. Through some incredibly stupid
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design idea, the reset for IRQ 0 is done by setting the
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high bit of the PPI port B (0x61). Note that some PS/2s,
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notably the 55SX, work fine if this is removed. */
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u8 irq_v = inb_p( 0x61 ); /* read the current state */
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outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */
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}
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write_sequnlock(&xtime_lock);
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#ifdef CONFIG_X86_LOCAL_APIC
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if (using_apic_timer)
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smp_send_timer_broadcast_ipi();
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#endif
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return IRQ_HANDLED;
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}
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/* not static: needed by APM */
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unsigned long get_cmos_time(void)
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{
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unsigned long retval;
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unsigned long flags;
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spin_lock_irqsave(&rtc_lock, flags);
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if (efi_enabled)
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retval = efi_get_time();
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else
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retval = mach_get_cmos_time();
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spin_unlock_irqrestore(&rtc_lock, flags);
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return retval;
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}
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EXPORT_SYMBOL(get_cmos_time);
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static void sync_cmos_clock(unsigned long dummy);
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static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
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static void sync_cmos_clock(unsigned long dummy)
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{
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struct timeval now, next;
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int fail = 1;
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/*
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* If we have an externally synchronized Linux clock, then update
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* CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
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* called as close as possible to 500 ms before the new second starts.
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* This code is run on a timer. If the clock is set, that timer
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* may not expire at the correct time. Thus, we adjust...
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*/
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if (!ntp_synced())
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/*
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* Not synced, exit, do not restart a timer (if one is
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* running, let it run out).
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*/
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return;
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do_gettimeofday(&now);
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if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
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now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
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fail = set_rtc_mmss(now.tv_sec);
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next.tv_usec = USEC_AFTER - now.tv_usec;
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if (next.tv_usec <= 0)
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next.tv_usec += USEC_PER_SEC;
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if (!fail)
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next.tv_sec = 659;
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else
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next.tv_sec = 0;
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if (next.tv_usec >= USEC_PER_SEC) {
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next.tv_sec++;
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next.tv_usec -= USEC_PER_SEC;
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}
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mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
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}
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void notify_arch_cmos_timer(void)
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{
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mod_timer(&sync_cmos_timer, jiffies + 1);
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}
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static long clock_cmos_diff;
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static unsigned long sleep_start;
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static int timer_suspend(struct sys_device *dev, pm_message_t state)
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{
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/*
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* Estimate time zone so that set_time can update the clock
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*/
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unsigned long ctime = get_cmos_time();
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clock_cmos_diff = -ctime;
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clock_cmos_diff += get_seconds();
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sleep_start = ctime;
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return 0;
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}
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static int timer_resume(struct sys_device *dev)
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{
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unsigned long flags;
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unsigned long sec;
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unsigned long ctime = get_cmos_time();
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long sleep_length = (ctime - sleep_start) * HZ;
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struct timespec ts;
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if (sleep_length < 0) {
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printk(KERN_WARNING "CMOS clock skew detected in timer resume!\n");
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/* The time after the resume must not be earlier than the time
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* before the suspend or some nasty things will happen
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*/
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sleep_length = 0;
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ctime = sleep_start;
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}
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#ifdef CONFIG_HPET_TIMER
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if (is_hpet_enabled())
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hpet_reenable();
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#endif
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setup_pit_timer();
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sec = ctime + clock_cmos_diff;
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ts.tv_sec = sec;
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ts.tv_nsec = 0;
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do_settimeofday(&ts);
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write_seqlock_irqsave(&xtime_lock, flags);
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jiffies_64 += sleep_length;
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write_sequnlock_irqrestore(&xtime_lock, flags);
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touch_softlockup_watchdog();
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return 0;
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}
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static struct sysdev_class timer_sysclass = {
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.resume = timer_resume,
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.suspend = timer_suspend,
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set_kset_name("timer"),
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};
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/* XXX this driverfs stuff should probably go elsewhere later -john */
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static struct sys_device device_timer = {
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.id = 0,
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.cls = &timer_sysclass,
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};
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static int time_init_device(void)
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{
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int error = sysdev_class_register(&timer_sysclass);
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if (!error)
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error = sysdev_register(&device_timer);
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return error;
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}
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device_initcall(time_init_device);
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#ifdef CONFIG_HPET_TIMER
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extern void (*late_time_init)(void);
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/* Duplicate of time_init() below, with hpet_enable part added */
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static void __init hpet_time_init(void)
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{
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struct timespec ts;
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ts.tv_sec = get_cmos_time();
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ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
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do_settimeofday(&ts);
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if ((hpet_enable() >= 0) && hpet_use_timer) {
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printk("Using HPET for base-timer\n");
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}
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time_init_hook();
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}
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#endif
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void __init time_init(void)
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{
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struct timespec ts;
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#ifdef CONFIG_HPET_TIMER
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if (is_hpet_capable()) {
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/*
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* HPET initialization needs to do memory-mapped io. So, let
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* us do a late initialization after mem_init().
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*/
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late_time_init = hpet_time_init;
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return;
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}
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#endif
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ts.tv_sec = get_cmos_time();
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ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
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do_settimeofday(&ts);
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time_init_hook();
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}
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