158 lines
3.9 KiB
C
158 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// LPC variant I/O for Microchip EC
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//
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// Copyright (C) 2016 Google, Inc
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/types.h>
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#include "cros_ec_lpc_mec.h"
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/*
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* This mutex must be held while accessing the EMI unit. We can't rely on the
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* EC mutex because memmap data may be accessed without it being held.
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*/
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static struct mutex io_mutex;
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static u16 mec_emi_base, mec_emi_end;
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/*
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* cros_ec_lpc_mec_emi_write_address
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*
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* Initialize EMI read / write at a given address.
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*
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* @addr: Starting read / write address
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* @access_type: Type of access, typically 32-bit auto-increment
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*/
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static void cros_ec_lpc_mec_emi_write_address(u16 addr,
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enum cros_ec_lpc_mec_emi_access_mode access_type)
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{
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outb((addr & 0xfc) | access_type, MEC_EMI_EC_ADDRESS_B0(mec_emi_base));
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outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1(mec_emi_base));
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}
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/**
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* cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
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*
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* @offset: Address offset
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* @length: Number of bytes to check
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*
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* Return: 1 if in range, 0 if not, and -EINVAL on failure
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* such as the mec range not being initialized
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*/
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int cros_ec_lpc_mec_in_range(unsigned int offset, unsigned int length)
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{
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if (length == 0)
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return -EINVAL;
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if (WARN_ON(mec_emi_base == 0 || mec_emi_end == 0))
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return -EINVAL;
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if (offset >= mec_emi_base && offset < mec_emi_end) {
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if (WARN_ON(offset + length - 1 >= mec_emi_end))
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return -EINVAL;
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return 1;
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}
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if (WARN_ON(offset + length > mec_emi_base && offset < mec_emi_end))
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return -EINVAL;
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return 0;
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}
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/*
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* cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port
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*
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* @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request
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* @offset: Base read / write address
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* @length: Number of bytes to read / write
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* @buf: Destination / source buffer
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*
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* @return 8-bit checksum of all bytes read / written
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*/
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u8 cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,
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unsigned int offset, unsigned int length,
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u8 *buf)
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{
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int i = 0;
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int io_addr;
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u8 sum = 0;
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enum cros_ec_lpc_mec_emi_access_mode access, new_access;
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/* Return checksum of 0 if window is not initialized */
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WARN_ON(mec_emi_base == 0 || mec_emi_end == 0);
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if (mec_emi_base == 0 || mec_emi_end == 0)
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return 0;
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/*
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* Long access cannot be used on misaligned data since reading B0 loads
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* the data register and writing B3 flushes.
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*/
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if (offset & 0x3 || length < 4)
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access = ACCESS_TYPE_BYTE;
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else
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access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
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mutex_lock(&io_mutex);
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/* Initialize I/O at desired address */
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cros_ec_lpc_mec_emi_write_address(offset, access);
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/* Skip bytes in case of misaligned offset */
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io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base) + (offset & 0x3);
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while (i < length) {
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while (io_addr <= MEC_EMI_EC_DATA_B3(mec_emi_base)) {
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if (io_type == MEC_IO_READ)
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buf[i] = inb(io_addr++);
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else
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outb(buf[i], io_addr++);
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sum += buf[i++];
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offset++;
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/* Extra bounds check in case of misaligned length */
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if (i == length)
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goto done;
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}
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/*
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* Use long auto-increment access except for misaligned write,
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* since writing B3 triggers the flush.
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*/
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if (length - i < 4 && io_type == MEC_IO_WRITE)
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new_access = ACCESS_TYPE_BYTE;
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else
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new_access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
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if (new_access != access ||
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access != ACCESS_TYPE_LONG_AUTO_INCREMENT) {
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access = new_access;
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cros_ec_lpc_mec_emi_write_address(offset, access);
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}
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/* Access [B0, B3] on each loop pass */
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io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base);
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}
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done:
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mutex_unlock(&io_mutex);
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return sum;
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}
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EXPORT_SYMBOL(cros_ec_lpc_io_bytes_mec);
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void cros_ec_lpc_mec_init(unsigned int base, unsigned int end)
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{
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mutex_init(&io_mutex);
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mec_emi_base = base;
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mec_emi_end = end;
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}
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EXPORT_SYMBOL(cros_ec_lpc_mec_init);
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void cros_ec_lpc_mec_destroy(void)
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{
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mutex_destroy(&io_mutex);
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}
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EXPORT_SYMBOL(cros_ec_lpc_mec_destroy);
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