534 lines
13 KiB
C
534 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PCI VPD support
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*
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* Copyright (C) 2010 Broadcom Corporation.
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*/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/sched/signal.h>
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#include "pci.h"
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/* VPD access through PCI 2.2+ VPD capability */
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struct pci_vpd_ops {
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ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
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ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
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};
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struct pci_vpd {
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const struct pci_vpd_ops *ops;
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struct mutex lock;
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unsigned int len;
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u16 flag;
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u8 cap;
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unsigned int busy:1;
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unsigned int valid:1;
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};
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static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev)
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{
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return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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}
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/**
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* pci_read_vpd - Read one entry from Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to read
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* @buf: pointer to where to store result
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*/
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ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->read(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_read_vpd);
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/**
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* pci_write_vpd - Write entry to Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to write
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* @buf: buffer containing write data
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*/
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ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->write(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_write_vpd);
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#define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
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/**
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* pci_vpd_size - determine actual size of Vital Product Data
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* @dev: pci device struct
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* @old_size: current assumed size, also maximum allowed size
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*/
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static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size)
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{
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size_t off = 0;
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unsigned char header[1+2]; /* 1 byte tag, 2 bytes length */
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while (off < old_size && pci_read_vpd(dev, off, 1, header) == 1) {
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unsigned char tag;
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if (!header[0] && !off) {
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pci_info(dev, "Invalid VPD tag 00, assume missing optional VPD EPROM\n");
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return 0;
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}
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if (header[0] & PCI_VPD_LRDT) {
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/* Large Resource Data Type Tag */
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tag = pci_vpd_lrdt_tag(header);
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/* Only read length from known tag items */
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if ((tag == PCI_VPD_LTIN_ID_STRING) ||
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(tag == PCI_VPD_LTIN_RO_DATA) ||
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(tag == PCI_VPD_LTIN_RW_DATA)) {
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if (pci_read_vpd(dev, off+1, 2,
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&header[1]) != 2) {
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pci_warn(dev, "invalid large VPD tag %02x size at offset %zu",
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tag, off + 1);
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return 0;
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}
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off += PCI_VPD_LRDT_TAG_SIZE +
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pci_vpd_lrdt_size(header);
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}
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} else {
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/* Short Resource Data Type Tag */
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off += PCI_VPD_SRDT_TAG_SIZE +
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pci_vpd_srdt_size(header);
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tag = pci_vpd_srdt_tag(header);
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}
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if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
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return off;
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if ((tag != PCI_VPD_LTIN_ID_STRING) &&
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(tag != PCI_VPD_LTIN_RO_DATA) &&
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(tag != PCI_VPD_LTIN_RW_DATA)) {
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pci_warn(dev, "invalid %s VPD tag %02x at offset %zu",
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(header[0] & PCI_VPD_LRDT) ? "large" : "short",
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tag, off);
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return 0;
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}
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}
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return 0;
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}
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/*
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* Wait for last operation to complete.
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* This code has to spin since there is no other notification from the PCI
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* hardware. Since the VPD is often implemented by serial attachment to an
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* EEPROM, it may take many milliseconds to complete.
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*
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* Returns 0 on success, negative values indicate error.
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*/
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static int pci_vpd_wait(struct pci_dev *dev)
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{
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struct pci_vpd *vpd = dev->vpd;
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unsigned long timeout = jiffies + msecs_to_jiffies(125);
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unsigned long max_sleep = 16;
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u16 status;
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int ret;
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if (!vpd->busy)
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return 0;
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do {
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ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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&status);
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if (ret < 0)
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return ret;
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if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
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vpd->busy = 0;
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return 0;
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}
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if (fatal_signal_pending(current))
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return -EINTR;
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if (time_after(jiffies, timeout))
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break;
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usleep_range(10, max_sleep);
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if (max_sleep < 1024)
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max_sleep *= 2;
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} while (true);
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pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
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return -ETIMEDOUT;
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}
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static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_vpd *vpd = dev->vpd;
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int ret;
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loff_t end = pos + count;
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u8 *buf = arg;
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if (pos < 0)
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return -EINVAL;
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if (!vpd->valid) {
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vpd->valid = 1;
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vpd->len = pci_vpd_size(dev, vpd->len);
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}
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if (vpd->len == 0)
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return -EIO;
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if (pos > vpd->len)
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return 0;
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if (end > vpd->len) {
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end = vpd->len;
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count = end - pos;
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}
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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unsigned int i, skip;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos & ~3);
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if (ret < 0)
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break;
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vpd->busy = 1;
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vpd->flag = PCI_VPD_ADDR_F;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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break;
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ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
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if (ret < 0)
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break;
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skip = pos & 3;
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for (i = 0; i < sizeof(u32); i++) {
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if (i >= skip) {
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*buf++ = val;
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if (++pos == end)
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break;
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}
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val >>= 8;
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}
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_vpd *vpd = dev->vpd;
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const u8 *buf = arg;
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loff_t end = pos + count;
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int ret = 0;
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if (pos < 0 || (pos & 3) || (count & 3))
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return -EINVAL;
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if (!vpd->valid) {
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vpd->valid = 1;
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vpd->len = pci_vpd_size(dev, vpd->len);
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}
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if (vpd->len == 0)
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return -EIO;
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if (end > vpd->len)
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return -EINVAL;
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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val = *buf++;
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val |= *buf++ << 8;
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val |= *buf++ << 16;
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val |= *buf++ << 24;
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ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
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if (ret < 0)
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break;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos | PCI_VPD_ADDR_F);
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if (ret < 0)
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break;
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vpd->busy = 1;
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vpd->flag = 0;
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ret = pci_vpd_wait(dev);
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if (ret < 0)
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break;
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pos += sizeof(u32);
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static const struct pci_vpd_ops pci_vpd_ops = {
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.read = pci_vpd_read,
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.write = pci_vpd_write,
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};
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static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_dev *tdev = pci_get_func0_dev(dev);
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ssize_t ret;
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if (!tdev)
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return -ENODEV;
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ret = pci_read_vpd(tdev, pos, count, arg);
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pci_dev_put(tdev);
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return ret;
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}
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static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_dev *tdev = pci_get_func0_dev(dev);
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ssize_t ret;
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if (!tdev)
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return -ENODEV;
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ret = pci_write_vpd(tdev, pos, count, arg);
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pci_dev_put(tdev);
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return ret;
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}
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static const struct pci_vpd_ops pci_vpd_f0_ops = {
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.read = pci_vpd_f0_read,
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.write = pci_vpd_f0_write,
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};
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void pci_vpd_init(struct pci_dev *dev)
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{
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struct pci_vpd *vpd;
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u8 cap;
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cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
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if (!cap)
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return;
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vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
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if (!vpd)
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return;
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vpd->len = PCI_VPD_MAX_SIZE;
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if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
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vpd->ops = &pci_vpd_f0_ops;
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else
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vpd->ops = &pci_vpd_ops;
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mutex_init(&vpd->lock);
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vpd->cap = cap;
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vpd->busy = 0;
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vpd->valid = 0;
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dev->vpd = vpd;
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}
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void pci_vpd_release(struct pci_dev *dev)
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{
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kfree(dev->vpd);
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}
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static ssize_t vpd_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr, char *buf, loff_t off,
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size_t count)
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{
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struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
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return pci_read_vpd(dev, off, count, buf);
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}
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static ssize_t vpd_write(struct file *filp, struct kobject *kobj,
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struct bin_attribute *bin_attr, char *buf, loff_t off,
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size_t count)
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{
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struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
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return pci_write_vpd(dev, off, count, buf);
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}
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static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
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static struct bin_attribute *vpd_attrs[] = {
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&bin_attr_vpd,
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NULL,
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};
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static umode_t vpd_attr_is_visible(struct kobject *kobj,
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struct bin_attribute *a, int n)
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{
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struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
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if (!pdev->vpd)
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return 0;
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return a->attr.mode;
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}
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const struct attribute_group pci_dev_vpd_attr_group = {
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.bin_attrs = vpd_attrs,
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.is_bin_visible = vpd_attr_is_visible,
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};
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int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt)
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{
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int i = 0;
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/* look for LRDT tags only, end tag is the only SRDT tag */
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while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) {
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if (buf[i] == rdt)
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return i;
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i += PCI_VPD_LRDT_TAG_SIZE + pci_vpd_lrdt_size(buf + i);
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(pci_vpd_find_tag);
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int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
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unsigned int len, const char *kw)
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{
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int i;
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for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
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if (buf[i + 0] == kw[0] &&
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buf[i + 1] == kw[1])
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return i;
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i += PCI_VPD_INFO_FLD_HDR_SIZE +
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pci_vpd_info_field_size(&buf[i]);
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(pci_vpd_find_info_keyword);
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#ifdef CONFIG_PCI_QUIRKS
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/*
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* Quirk non-zero PCI functions to route VPD access through function 0 for
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* devices that share VPD resources between functions. The functions are
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* expected to be identical devices.
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*/
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static void quirk_f0_vpd_link(struct pci_dev *dev)
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{
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struct pci_dev *f0;
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if (!PCI_FUNC(dev->devfn))
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return;
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f0 = pci_get_func0_dev(dev);
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if (!f0)
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return;
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if (f0->vpd && dev->class == f0->class &&
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dev->vendor == f0->vendor && dev->device == f0->device)
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dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
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pci_dev_put(f0);
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}
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DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
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PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
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/*
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* If a device follows the VPD format spec, the PCI core will not read or
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* write past the VPD End Tag. But some vendors do not follow the VPD
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* format spec, so we can't tell how much data is safe to access. Devices
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* may behave unpredictably if we access too much. Blacklist these devices
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* so we don't touch VPD at all.
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*/
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static void quirk_blacklist_vpd(struct pci_dev *dev)
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{
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if (dev->vpd) {
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dev->vpd->len = 0;
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pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID,
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quirk_blacklist_vpd);
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/*
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* The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
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* device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
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*/
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DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
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PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
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static void pci_vpd_set_size(struct pci_dev *dev, size_t len)
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{
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struct pci_vpd *vpd = dev->vpd;
|
|
|
|
if (!vpd || len == 0 || len > PCI_VPD_MAX_SIZE)
|
|
return;
|
|
|
|
vpd->valid = 1;
|
|
vpd->len = len;
|
|
}
|
|
|
|
static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
|
|
{
|
|
int chip = (dev->device & 0xf000) >> 12;
|
|
int func = (dev->device & 0x0f00) >> 8;
|
|
int prod = (dev->device & 0x00ff) >> 0;
|
|
|
|
/*
|
|
* If this is a T3-based adapter, there's a 1KB VPD area at offset
|
|
* 0xc00 which contains the preferred VPD values. If this is a T4 or
|
|
* later based adapter, the special VPD is at offset 0x400 for the
|
|
* Physical Functions (the SR-IOV Virtual Functions have no VPD
|
|
* Capabilities). The PCI VPD Access core routines will normally
|
|
* compute the size of the VPD by parsing the VPD Data Structure at
|
|
* offset 0x000. This will result in silent failures when attempting
|
|
* to accesses these other VPD areas which are beyond those computed
|
|
* limits.
|
|
*/
|
|
if (chip == 0x0 && prod >= 0x20)
|
|
pci_vpd_set_size(dev, 8192);
|
|
else if (chip >= 0x4 && func < 0x8)
|
|
pci_vpd_set_size(dev, 2048);
|
|
}
|
|
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
|
|
quirk_chelsio_extend_vpd);
|
|
|
|
#endif
|