336 lines
7.4 KiB
Plaintext
336 lines
7.4 KiB
Plaintext
/*
|
|
* MPC8349E MDS Device Tree Source
|
|
*
|
|
* Copyright 2005, 2006 Freescale Semiconductor Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
/ {
|
|
model = "MPC8349EMDS";
|
|
compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
PowerPC,8349@0 {
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
d-cache-line-size = <20>; // 32 bytes
|
|
i-cache-line-size = <20>; // 32 bytes
|
|
d-cache-size = <8000>; // L1, 32K
|
|
i-cache-size = <8000>; // L1, 32K
|
|
timebase-frequency = <0>; // from bootloader
|
|
bus-frequency = <0>; // from bootloader
|
|
clock-frequency = <0>; // from bootloader
|
|
};
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <00000000 10000000>; // 256MB at 0
|
|
};
|
|
|
|
bcsr@e2400000 {
|
|
device_type = "board-control";
|
|
reg = <e2400000 8000>;
|
|
};
|
|
|
|
soc8349@e0000000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
device_type = "soc";
|
|
ranges = <0 e0000000 00100000>;
|
|
reg = <e0000000 00000200>;
|
|
bus-frequency = <0>;
|
|
|
|
wdt@200 {
|
|
device_type = "watchdog";
|
|
compatible = "mpc83xx_wdt";
|
|
reg = <200 100>;
|
|
};
|
|
|
|
i2c@3000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cell-index = <0>;
|
|
compatible = "fsl-i2c";
|
|
reg = <3000 100>;
|
|
interrupts = <e 8>;
|
|
interrupt-parent = < &ipic >;
|
|
dfsrr;
|
|
|
|
rtc@68 {
|
|
compatible = "dallas,ds1374";
|
|
reg = <68>;
|
|
};
|
|
};
|
|
|
|
i2c@3100 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cell-index = <1>;
|
|
compatible = "fsl-i2c";
|
|
reg = <3100 100>;
|
|
interrupts = <f 8>;
|
|
interrupt-parent = < &ipic >;
|
|
dfsrr;
|
|
};
|
|
|
|
spi@7000 {
|
|
device_type = "spi";
|
|
compatible = "fsl_spi";
|
|
reg = <7000 1000>;
|
|
interrupts = <10 8>;
|
|
interrupt-parent = < &ipic >;
|
|
mode = "cpu";
|
|
};
|
|
|
|
/* phy type (ULPI or SERIAL) are only types supportted for MPH */
|
|
/* port = 0 or 1 */
|
|
usb@22000 {
|
|
device_type = "usb";
|
|
compatible = "fsl-usb2-mph";
|
|
reg = <22000 1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <27 8>;
|
|
phy_type = "ulpi";
|
|
port1;
|
|
};
|
|
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
|
|
usb@23000 {
|
|
device_type = "usb";
|
|
compatible = "fsl-usb2-dr";
|
|
reg = <23000 1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <26 8>;
|
|
dr_mode = "otg";
|
|
phy_type = "ulpi";
|
|
};
|
|
|
|
mdio@24520 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,gianfar-mdio";
|
|
reg = <24520 20>;
|
|
|
|
phy0: ethernet-phy@0 {
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <11 8>;
|
|
reg = <0>;
|
|
device_type = "ethernet-phy";
|
|
};
|
|
phy1: ethernet-phy@1 {
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <12 8>;
|
|
reg = <1>;
|
|
device_type = "ethernet-phy";
|
|
};
|
|
};
|
|
|
|
enet0: ethernet@24000 {
|
|
cell-index = <0>;
|
|
device_type = "network";
|
|
model = "TSEC";
|
|
compatible = "gianfar";
|
|
reg = <24000 1000>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
interrupts = <20 8 21 8 22 8>;
|
|
interrupt-parent = < &ipic >;
|
|
phy-handle = < &phy0 >;
|
|
linux,network-index = <0>;
|
|
};
|
|
|
|
enet1: ethernet@25000 {
|
|
cell-index = <1>;
|
|
device_type = "network";
|
|
model = "TSEC";
|
|
compatible = "gianfar";
|
|
reg = <25000 1000>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
interrupts = <23 8 24 8 25 8>;
|
|
interrupt-parent = < &ipic >;
|
|
phy-handle = < &phy1 >;
|
|
linux,network-index = <1>;
|
|
};
|
|
|
|
serial@4500 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <4500 100>;
|
|
clock-frequency = <0>;
|
|
interrupts = <9 8>;
|
|
interrupt-parent = < &ipic >;
|
|
};
|
|
|
|
serial@4600 {
|
|
device_type = "serial";
|
|
compatible = "ns16550";
|
|
reg = <4600 100>;
|
|
clock-frequency = <0>;
|
|
interrupts = <a 8>;
|
|
interrupt-parent = < &ipic >;
|
|
};
|
|
|
|
/* May need to remove if on a part without crypto engine */
|
|
crypto@30000 {
|
|
device_type = "crypto";
|
|
model = "SEC2";
|
|
compatible = "talitos";
|
|
reg = <30000 10000>;
|
|
interrupts = <b 8>;
|
|
interrupt-parent = < &ipic >;
|
|
num-channels = <4>;
|
|
channel-fifo-len = <18>;
|
|
exec-units-mask = <0000007e>;
|
|
/* desc mask is for rev2.0,
|
|
* we need runtime fixup for >2.0 */
|
|
descriptor-types-mask = <01010ebf>;
|
|
};
|
|
|
|
/* IPIC
|
|
* interrupts cell = <intr #, sense>
|
|
* sense values match linux IORESOURCE_IRQ_* defines:
|
|
* sense == 8: Level, low assertion
|
|
* sense == 2: Edge, high-to-low change
|
|
*/
|
|
ipic: pic@700 {
|
|
interrupt-controller;
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <2>;
|
|
reg = <700 100>;
|
|
device_type = "ipic";
|
|
};
|
|
};
|
|
|
|
pci@e0008500 {
|
|
interrupt-map-mask = <f800 0 0 7>;
|
|
interrupt-map = <
|
|
|
|
/* IDSEL 0x11 */
|
|
8800 0 0 1 &ipic 14 8
|
|
8800 0 0 2 &ipic 15 8
|
|
8800 0 0 3 &ipic 16 8
|
|
8800 0 0 4 &ipic 17 8
|
|
|
|
/* IDSEL 0x12 */
|
|
9000 0 0 1 &ipic 16 8
|
|
9000 0 0 2 &ipic 17 8
|
|
9000 0 0 3 &ipic 14 8
|
|
9000 0 0 4 &ipic 15 8
|
|
|
|
/* IDSEL 0x13 */
|
|
9800 0 0 1 &ipic 17 8
|
|
9800 0 0 2 &ipic 14 8
|
|
9800 0 0 3 &ipic 15 8
|
|
9800 0 0 4 &ipic 16 8
|
|
|
|
/* IDSEL 0x15 */
|
|
a800 0 0 1 &ipic 14 8
|
|
a800 0 0 2 &ipic 15 8
|
|
a800 0 0 3 &ipic 16 8
|
|
a800 0 0 4 &ipic 17 8
|
|
|
|
/* IDSEL 0x16 */
|
|
b000 0 0 1 &ipic 17 8
|
|
b000 0 0 2 &ipic 14 8
|
|
b000 0 0 3 &ipic 15 8
|
|
b000 0 0 4 &ipic 16 8
|
|
|
|
/* IDSEL 0x17 */
|
|
b800 0 0 1 &ipic 16 8
|
|
b800 0 0 2 &ipic 17 8
|
|
b800 0 0 3 &ipic 14 8
|
|
b800 0 0 4 &ipic 15 8
|
|
|
|
/* IDSEL 0x18 */
|
|
c000 0 0 1 &ipic 15 8
|
|
c000 0 0 2 &ipic 16 8
|
|
c000 0 0 3 &ipic 17 8
|
|
c000 0 0 4 &ipic 14 8>;
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <42 8>;
|
|
bus-range = <0 0>;
|
|
ranges = <02000000 0 90000000 90000000 0 10000000
|
|
42000000 0 80000000 80000000 0 10000000
|
|
01000000 0 00000000 e2000000 0 00100000>;
|
|
clock-frequency = <3f940aa>;
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
reg = <e0008500 100>;
|
|
compatible = "fsl,mpc8349-pci";
|
|
device_type = "pci";
|
|
};
|
|
|
|
pci@e0008600 {
|
|
interrupt-map-mask = <f800 0 0 7>;
|
|
interrupt-map = <
|
|
|
|
/* IDSEL 0x11 */
|
|
8800 0 0 1 &ipic 14 8
|
|
8800 0 0 2 &ipic 15 8
|
|
8800 0 0 3 &ipic 16 8
|
|
8800 0 0 4 &ipic 17 8
|
|
|
|
/* IDSEL 0x12 */
|
|
9000 0 0 1 &ipic 16 8
|
|
9000 0 0 2 &ipic 17 8
|
|
9000 0 0 3 &ipic 14 8
|
|
9000 0 0 4 &ipic 15 8
|
|
|
|
/* IDSEL 0x13 */
|
|
9800 0 0 1 &ipic 17 8
|
|
9800 0 0 2 &ipic 14 8
|
|
9800 0 0 3 &ipic 15 8
|
|
9800 0 0 4 &ipic 16 8
|
|
|
|
/* IDSEL 0x15 */
|
|
a800 0 0 1 &ipic 14 8
|
|
a800 0 0 2 &ipic 15 8
|
|
a800 0 0 3 &ipic 16 8
|
|
a800 0 0 4 &ipic 17 8
|
|
|
|
/* IDSEL 0x16 */
|
|
b000 0 0 1 &ipic 17 8
|
|
b000 0 0 2 &ipic 14 8
|
|
b000 0 0 3 &ipic 15 8
|
|
b000 0 0 4 &ipic 16 8
|
|
|
|
/* IDSEL 0x17 */
|
|
b800 0 0 1 &ipic 16 8
|
|
b800 0 0 2 &ipic 17 8
|
|
b800 0 0 3 &ipic 14 8
|
|
b800 0 0 4 &ipic 15 8
|
|
|
|
/* IDSEL 0x18 */
|
|
c000 0 0 1 &ipic 15 8
|
|
c000 0 0 2 &ipic 16 8
|
|
c000 0 0 3 &ipic 17 8
|
|
c000 0 0 4 &ipic 14 8>;
|
|
interrupt-parent = < &ipic >;
|
|
interrupts = <42 8>;
|
|
bus-range = <0 0>;
|
|
ranges = <02000000 0 b0000000 b0000000 0 10000000
|
|
42000000 0 a0000000 a0000000 0 10000000
|
|
01000000 0 00000000 e2100000 0 00100000>;
|
|
clock-frequency = <3f940aa>;
|
|
#interrupt-cells = <1>;
|
|
#size-cells = <2>;
|
|
#address-cells = <3>;
|
|
reg = <e0008600 100>;
|
|
compatible = "fsl,mpc8349-pci";
|
|
device_type = "pci";
|
|
};
|
|
};
|