242 lines
6.1 KiB
C
242 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/cpuhotplug.h>
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#include <linux/cpumask.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <asm/apic.h>
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#include "local.h"
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struct cluster_mask {
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unsigned int clusterid;
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int node;
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struct cpumask mask;
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};
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/*
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* __x2apic_send_IPI_mask() possibly needs to read
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* x86_cpu_to_logical_apicid for all online cpus in a sequential way.
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* Using per cpu variable would cost one cache line per cpu.
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*/
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static u32 *x86_cpu_to_logical_apicid __read_mostly;
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static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
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static DEFINE_PER_CPU_READ_MOSTLY(struct cluster_mask *, cluster_masks);
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static struct cluster_mask *cluster_hotplug_mask;
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static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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return x2apic_enabled();
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}
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static void x2apic_send_IPI(int cpu, int vector)
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{
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u32 dest = x86_cpu_to_logical_apicid[cpu];
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/* x2apic MSRs are special and need a special fence: */
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weak_wrmsr_fence();
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__x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
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}
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static void
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__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
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{
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unsigned int cpu, clustercpu;
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struct cpumask *tmpmsk;
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unsigned long flags;
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u32 dest;
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/* x2apic MSRs are special and need a special fence: */
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weak_wrmsr_fence();
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local_irq_save(flags);
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tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
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cpumask_copy(tmpmsk, mask);
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/* If IPI should not be sent to self, clear current CPU */
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if (apic_dest != APIC_DEST_ALLINC)
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__cpumask_clear_cpu(smp_processor_id(), tmpmsk);
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/* Collapse cpus in a cluster so a single IPI per cluster is sent */
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for_each_cpu(cpu, tmpmsk) {
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struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
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dest = 0;
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for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask)
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dest |= x86_cpu_to_logical_apicid[clustercpu];
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if (!dest)
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continue;
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__x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
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/* Remove cluster CPUs from tmpmask */
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cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
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}
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local_irq_restore(flags);
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}
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static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
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{
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__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
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}
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static void
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x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
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{
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__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
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}
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static void x2apic_send_IPI_allbutself(int vector)
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{
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__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
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}
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static void x2apic_send_IPI_all(int vector)
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{
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__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
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}
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static u32 x2apic_calc_apicid(unsigned int cpu)
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{
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return x86_cpu_to_logical_apicid[cpu];
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}
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static void init_x2apic_ldr(void)
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{
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struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
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u32 cluster, apicid = apic_read(APIC_LDR);
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unsigned int cpu;
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x86_cpu_to_logical_apicid[smp_processor_id()] = apicid;
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if (cmsk)
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goto update;
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cluster = apicid >> 16;
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for_each_online_cpu(cpu) {
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cmsk = per_cpu(cluster_masks, cpu);
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/* Matching cluster found. Link and update it. */
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if (cmsk && cmsk->clusterid == cluster)
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goto update;
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}
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cmsk = cluster_hotplug_mask;
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cmsk->clusterid = cluster;
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cluster_hotplug_mask = NULL;
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update:
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this_cpu_write(cluster_masks, cmsk);
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cpumask_set_cpu(smp_processor_id(), &cmsk->mask);
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}
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static int alloc_clustermask(unsigned int cpu, int node)
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{
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if (per_cpu(cluster_masks, cpu))
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return 0;
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/*
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* If a hotplug spare mask exists, check whether it's on the right
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* node. If not, free it and allocate a new one.
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*/
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if (cluster_hotplug_mask) {
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if (cluster_hotplug_mask->node == node)
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return 0;
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kfree(cluster_hotplug_mask);
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}
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cluster_hotplug_mask = kzalloc_node(sizeof(*cluster_hotplug_mask),
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GFP_KERNEL, node);
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if (!cluster_hotplug_mask)
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return -ENOMEM;
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cluster_hotplug_mask->node = node;
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return 0;
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}
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static int x2apic_prepare_cpu(unsigned int cpu)
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{
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if (alloc_clustermask(cpu, cpu_to_node(cpu)) < 0)
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return -ENOMEM;
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if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
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return -ENOMEM;
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return 0;
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}
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static int x2apic_dead_cpu(unsigned int dead_cpu)
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{
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struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
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if (cmsk)
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cpumask_clear_cpu(dead_cpu, &cmsk->mask);
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free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
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return 0;
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}
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static int x2apic_cluster_probe(void)
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{
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u32 slots;
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if (!x2apic_mode)
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return 0;
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slots = max_t(u32, L1_CACHE_BYTES/sizeof(u32), nr_cpu_ids);
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x86_cpu_to_logical_apicid = kcalloc(slots, sizeof(u32), GFP_KERNEL);
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if (!x86_cpu_to_logical_apicid)
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return 0;
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if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
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x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
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pr_err("Failed to register X2APIC_PREPARE\n");
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kfree(x86_cpu_to_logical_apicid);
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x86_cpu_to_logical_apicid = NULL;
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return 0;
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}
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init_x2apic_ldr();
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return 1;
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}
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static struct apic apic_x2apic_cluster __ro_after_init = {
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.name = "cluster x2apic",
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.probe = x2apic_cluster_probe,
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.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
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.apic_id_valid = x2apic_apic_id_valid,
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.apic_id_registered = x2apic_apic_id_registered,
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.delivery_mode = APIC_DELIVERY_MODE_FIXED,
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.dest_mode_logical = true,
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.disable_esr = 0,
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.check_apicid_used = NULL,
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.init_apic_ldr = init_x2apic_ldr,
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.ioapic_phys_id_map = NULL,
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.setup_apic_routing = NULL,
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.cpu_present_to_apicid = default_cpu_present_to_apicid,
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.apicid_to_cpu_present = NULL,
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.check_phys_apicid_present = default_check_phys_apicid_present,
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.phys_pkg_id = x2apic_phys_pkg_id,
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.get_apic_id = x2apic_get_apic_id,
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.set_apic_id = x2apic_set_apic_id,
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.calc_dest_apicid = x2apic_calc_apicid,
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.send_IPI = x2apic_send_IPI,
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.send_IPI_mask = x2apic_send_IPI_mask,
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.send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
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.send_IPI_allbutself = x2apic_send_IPI_allbutself,
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.send_IPI_all = x2apic_send_IPI_all,
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.send_IPI_self = x2apic_send_IPI_self,
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.inquire_remote_apic = NULL,
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.read = native_apic_msr_read,
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.write = native_apic_msr_write,
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.eoi_write = native_apic_msr_eoi_write,
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.icr_read = native_x2apic_icr_read,
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.icr_write = native_x2apic_icr_write,
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.wait_icr_idle = native_x2apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
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};
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apic_driver(apic_x2apic_cluster);
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