67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MMU_H
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#define _ASM_X86_MMU_H
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#include <linux/spinlock.h>
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#include <linux/rwsem.h>
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#include <linux/mutex.h>
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#include <linux/atomic.h>
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/*
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* x86 has arch-specific MMU state beyond what lives in mm_struct.
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*/
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typedef struct {
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/*
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* ctx_id uniquely identifies this mm_struct. A ctx_id will never
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* be reused, and zero is not a valid ctx_id.
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*/
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u64 ctx_id;
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/*
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* Any code that needs to do any sort of TLB flushing for this
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* mm will first make its changes to the page tables, then
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* increment tlb_gen, then flush. This lets the low-level
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* flushing code keep track of what needs flushing.
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*
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* This is not used on Xen PV.
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*/
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atomic64_t tlb_gen;
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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struct rw_semaphore ldt_usr_sem;
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struct ldt_struct *ldt;
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#endif
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#ifdef CONFIG_X86_64
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/* True if mm supports a task running in 32 bit compatibility mode. */
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unsigned short ia32_compat;
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#endif
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struct mutex lock;
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void __user *vdso; /* vdso base address */
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const struct vdso_image *vdso_image; /* vdso image in use */
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atomic_t perf_rdpmc_allowed; /* nonzero if rdpmc is allowed */
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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/*
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* One bit per protection key says whether userspace can
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* use it or not. protected by mmap_sem.
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*/
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u16 pkey_allocation_map;
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s16 execute_only_pkey;
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#endif
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#ifdef CONFIG_X86_INTEL_MPX
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/* address of the bounds directory */
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void __user *bd_addr;
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#endif
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} mm_context_t;
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#define INIT_MM_CONTEXT(mm) \
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.context = { \
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.ctx_id = 1, \
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}
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void leave_mm(int cpu);
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#endif /* _ASM_X86_MMU_H */
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