434 lines
14 KiB
C
434 lines
14 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <drm/drm_connector.h>
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#include <drm/drm_mode_config.h>
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#include <drm/drm_vblank.h>
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#include "nouveau_drv.h"
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#include "nouveau_bios.h"
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#include "nouveau_connector.h"
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#include "head.h"
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#include "core.h"
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#include "crc.h"
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#include <nvif/push507c.h>
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#include <nvhw/class/cl907d.h>
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int
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head907d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 3)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i),
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, asyh->or.depth),
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HEAD_SET_CONTROL(i), 0x31ec6000 | head->base.index << 25 |
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NVVAL(NV907D, HEAD_SET_CONTROL, STRUCTURE, asyh->mode.interlace));
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return 0;
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}
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int
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head907d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_PROCAMP(i),
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NVDEF(NV907D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) |
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NVDEF(NV907D, HEAD_SET_PROCAMP, CHROMA_LPF, AUTO) |
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NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) |
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NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) |
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NVDEF(NV907D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) |
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NVDEF(NV907D, HEAD_SET_PROCAMP, RANGE_COMPRESSION, DISABLE));
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return 0;
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}
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static int
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head907d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_DITHER_CONTROL(i),
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NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
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NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
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NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
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NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
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return 0;
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}
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int
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head907d_ovly(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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u32 bounds = 0;
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int ret;
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if (asyh->ovly.cpp) {
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switch (asyh->ovly.cpp) {
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case 8: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break;
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case 4: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break;
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case 2: bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break;
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default:
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WARN_ON(1);
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break;
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}
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bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, USABLE, TRUE);
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} else {
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bounds |= NVDEF(NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16);
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}
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_OVERLAY_USAGE_BOUNDS(i), bounds);
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return 0;
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}
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static int
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head907d_base(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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u32 bounds = 0;
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int ret;
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if (asyh->base.cpp) {
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switch (asyh->base.cpp) {
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case 8: bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break;
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case 4: bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break;
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case 2: bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break;
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case 1: bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_8); break;
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default:
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WARN_ON(1);
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break;
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}
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bounds |= NVDEF(NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE);
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}
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(i), bounds);
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return 0;
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}
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int
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head907d_curs_clr(struct nv50_head *head)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 4)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_CURSOR(i),
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NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
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NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |
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NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);
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return 0;
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}
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int
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head907d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 5)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_CURSOR(i),
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NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |
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NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |
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NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |
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NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |
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NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |
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NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND),
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HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8);
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle);
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return 0;
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}
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int
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head907d_core_clr(struct nv50_head *head)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMAS_ISO(i), 0x00000000);
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return 0;
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}
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int
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head907d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 9)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_OFFSET(i),
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NVVAL(NV907D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));
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PUSH_MTHD(push, NV907D, HEAD_SET_SIZE(i),
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NVVAL(NV907D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |
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NVVAL(NV907D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),
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HEAD_SET_STORAGE(i),
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NVVAL(NV907D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |
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NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |
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NVVAL(NV907D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |
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NVVAL(NV907D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),
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HEAD_SET_PARAMS(i),
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NVVAL(NV907D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |
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NVDEF(NV907D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
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NVDEF(NV907D, HEAD_SET_PARAMS, GAMMA, LINEAR),
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HEAD_SET_CONTEXT_DMAS_ISO(i),
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NVVAL(NV907D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));
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PUSH_MTHD(push, NV907D, HEAD_SET_VIEWPORT_POINT_IN(i),
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NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |
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NVVAL(NV907D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));
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return 0;
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}
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int
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head907d_olut_clr(struct nv50_head *head)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 4)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_OUTPUT_LUT_LO(i),
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NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, ENABLE, DISABLE));
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_LUT(i), 0x00000000);
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return 0;
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}
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int
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head907d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 5)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_OUTPUT_LUT_LO(i),
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NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, ENABLE, ENABLE) |
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NVVAL(NV907D, HEAD_SET_OUTPUT_LUT_LO, MODE, asyh->olut.mode) |
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NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, NEVER_YIELD_TO_BASE, DISABLE),
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HEAD_SET_OUTPUT_LUT_HI(i),
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NVVAL(NV907D, HEAD_SET_OUTPUT_LUT_HI, ORIGIN, asyh->olut.offset >> 8));
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_LUT(i), asyh->olut.handle);
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return 0;
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}
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void
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head907d_olut_load(struct drm_color_lut *in, int size, void __iomem *mem)
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{
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for (; size--; in++, mem += 8) {
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writew(drm_color_lut_extract(in-> red, 14) + 0x6000, mem + 0);
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writew(drm_color_lut_extract(in->green, 14) + 0x6000, mem + 2);
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writew(drm_color_lut_extract(in-> blue, 14) + 0x6000, mem + 4);
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}
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/* INTERPOLATE modes require a "next" entry to interpolate with,
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* so we replicate the last entry to deal with this for now.
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*/
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writew(readw(mem - 8), mem + 0);
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writew(readw(mem - 6), mem + 2);
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writew(readw(mem - 4), mem + 4);
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}
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bool
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head907d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
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{
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if (size != 256 && size != 1024)
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return false;
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if (size == 1024)
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asyh->olut.mode = NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE;
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else
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asyh->olut.mode = NV907D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE;
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asyh->olut.load = head907d_olut_load;
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return true;
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}
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bool head907d_ilut_check(int size)
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{
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return size == 256 || size == 1024;
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}
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int
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head907d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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struct nv50_head_mode *m = &asyh->mode;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 13)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_OVERSCAN_COLOR(i),
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NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, RED, 0) |
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NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, GRN, 0) |
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NVVAL(NV907D, HEAD_SET_OVERSCAN_COLOR, BLU, 0),
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HEAD_SET_RASTER_SIZE(i),
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NVVAL(NV907D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |
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NVVAL(NV907D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),
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HEAD_SET_RASTER_SYNC_END(i),
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NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |
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NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),
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HEAD_SET_RASTER_BLANK_END(i),
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NVVAL(NV907D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |
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NVVAL(NV907D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),
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HEAD_SET_RASTER_BLANK_START(i),
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NVVAL(NV907D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |
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NVVAL(NV907D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks),
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HEAD_SET_RASTER_VERT_BLANK2(i),
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NVVAL(NV907D, HEAD_SET_RASTER_VERT_BLANK2, YSTART, m->v.blank2s) |
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NVVAL(NV907D, HEAD_SET_RASTER_VERT_BLANK2, YEND, m->v.blank2e));
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PUSH_MTHD(push, NV907D, HEAD_SET_DEFAULT_BASE_COLOR(i),
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NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, RED, 0) |
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NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, GREEN, 0) |
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NVVAL(NV907D, HEAD_SET_DEFAULT_BASE_COLOR, BLUE, 0));
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PUSH_MTHD(push, NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY(i),
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NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000) |
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NVDEF(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, ADJ1000DIV1001, FALSE),
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HEAD_SET_PIXEL_CLOCK_CONFIGURATION(i),
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NVDEF(NV907D, HEAD_SET_PIXEL_CLOCK_CONFIGURATION, MODE, CLK_CUSTOM) |
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NVDEF(NV907D, HEAD_SET_PIXEL_CLOCK_CONFIGURATION, NOT_DRIVER, FALSE) |
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NVDEF(NV907D, HEAD_SET_PIXEL_CLOCK_CONFIGURATION, ENABLE_HOPPING, FALSE),
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HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(i),
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NVVAL(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000) |
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NVDEF(NV907D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, ADJ1000DIV1001, FALSE));
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return 0;
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}
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int
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head907d_view(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 8)))
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return ret;
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PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER(i),
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NVDEF(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, VERTICAL_TAPS, TAPS_1) |
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NVDEF(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, HORIZONTAL_TAPS, TAPS_1) |
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, HRESPONSE_BIAS, 0) |
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NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_SCALER, VRESPONSE_BIAS, 0));
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PUSH_MTHD(push, NV907D, HEAD_SET_VIEWPORT_SIZE_IN(i),
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NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |
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NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));
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PUSH_MTHD(push, NV907D, HEAD_SET_VIEWPORT_SIZE_OUT(i),
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH),
|
|
|
|
HEAD_SET_VIEWPORT_SIZE_OUT_MIN(i),
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, WIDTH, asyh->view.oW) |
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MIN, HEIGHT, asyh->view.oH),
|
|
|
|
HEAD_SET_VIEWPORT_SIZE_OUT_MAX(i),
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, WIDTH, asyh->view.oW) |
|
|
NVVAL(NV907D, HEAD_SET_VIEWPORT_SIZE_OUT_MAX, HEIGHT, asyh->view.oH));
|
|
return 0;
|
|
}
|
|
|
|
const struct nv50_head_func
|
|
head907d = {
|
|
.view = head907d_view,
|
|
.mode = head907d_mode,
|
|
.olut = head907d_olut,
|
|
.ilut_check = head907d_ilut_check,
|
|
.olut_size = 1024,
|
|
.olut_set = head907d_olut_set,
|
|
.olut_clr = head907d_olut_clr,
|
|
.core_calc = head507d_core_calc,
|
|
.core_set = head907d_core_set,
|
|
.core_clr = head907d_core_clr,
|
|
.curs_layout = head507d_curs_layout,
|
|
.curs_format = head507d_curs_format,
|
|
.curs_set = head907d_curs_set,
|
|
.curs_clr = head907d_curs_clr,
|
|
.base = head907d_base,
|
|
.ovly = head907d_ovly,
|
|
.dither = head907d_dither,
|
|
.procamp = head907d_procamp,
|
|
.or = head907d_or,
|
|
};
|