352 lines
7.4 KiB
C
352 lines
7.4 KiB
C
/*
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* udbg for NS16550 compatible serial ports
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*
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* Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/types.h>
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#include <asm/udbg.h>
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#include <asm/io.h>
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#include <asm/reg_a2.h>
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extern u8 real_readb(volatile u8 __iomem *addr);
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extern void real_writeb(u8 data, volatile u8 __iomem *addr);
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extern u8 real_205_readb(volatile u8 __iomem *addr);
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extern void real_205_writeb(u8 data, volatile u8 __iomem *addr);
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struct NS16550 {
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/* this struct must be packed */
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unsigned char rbr; /* 0 */
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unsigned char ier; /* 1 */
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unsigned char fcr; /* 2 */
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unsigned char lcr; /* 3 */
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unsigned char mcr; /* 4 */
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unsigned char lsr; /* 5 */
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unsigned char msr; /* 6 */
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unsigned char scr; /* 7 */
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};
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#define thr rbr
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#define iir fcr
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#define dll rbr
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#define dlm ier
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#define dlab lcr
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#define LSR_DR 0x01 /* Data ready */
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#define LSR_OE 0x02 /* Overrun */
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#define LSR_PE 0x04 /* Parity error */
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#define LSR_FE 0x08 /* Framing error */
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#define LSR_BI 0x10 /* Break */
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#define LSR_THRE 0x20 /* Xmit holding register empty */
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#define LSR_TEMT 0x40 /* Xmitter empty */
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#define LSR_ERR 0x80 /* Error */
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#define LCR_DLAB 0x80
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static struct NS16550 __iomem *udbg_comport;
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static void udbg_550_flush(void)
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{
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if (udbg_comport) {
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while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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static void udbg_550_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_550_putc('\r');
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udbg_550_flush();
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out_8(&udbg_comport->thr, c);
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}
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}
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static int udbg_550_getc_poll(void)
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{
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if (udbg_comport) {
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if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
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return in_8(&udbg_comport->rbr);
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else
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return -1;
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}
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return -1;
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}
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static int udbg_550_getc(void)
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{
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if (udbg_comport) {
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while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
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/* wait for char */;
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return in_8(&udbg_comport->rbr);
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}
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return -1;
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}
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void udbg_init_uart(void __iomem *comport, unsigned int speed,
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unsigned int clock)
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{
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unsigned int dll, base_bauds;
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if (clock == 0)
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clock = 1843200;
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if (speed == 0)
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speed = 9600;
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base_bauds = clock / 16;
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dll = base_bauds / speed;
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if (comport) {
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udbg_comport = (struct NS16550 __iomem *)comport;
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out_8(&udbg_comport->lcr, 0x00);
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out_8(&udbg_comport->ier, 0xff);
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out_8(&udbg_comport->ier, 0x00);
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out_8(&udbg_comport->lcr, LCR_DLAB);
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out_8(&udbg_comport->dll, dll & 0xff);
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out_8(&udbg_comport->dlm, dll >> 8);
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/* 8 data, 1 stop, no parity */
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out_8(&udbg_comport->lcr, 0x03);
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/* RTS/DTR */
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out_8(&udbg_comport->mcr, 0x03);
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/* Clear & enable FIFOs */
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out_8(&udbg_comport->fcr ,0x07);
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udbg_putc = udbg_550_putc;
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udbg_flush = udbg_550_flush;
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udbg_getc = udbg_550_getc;
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udbg_getc_poll = udbg_550_getc_poll;
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}
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}
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unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
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{
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unsigned int dll, dlm, divisor, prescaler, speed;
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u8 old_lcr;
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struct NS16550 __iomem *port = comport;
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old_lcr = in_8(&port->lcr);
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/* select divisor latch registers. */
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out_8(&port->lcr, LCR_DLAB);
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/* now, read the divisor */
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dll = in_8(&port->dll);
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dlm = in_8(&port->dlm);
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divisor = dlm << 8 | dll;
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/* check prescaling */
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if (in_8(&port->mcr) & 0x80)
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prescaler = 4;
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else
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prescaler = 1;
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/* restore the LCR */
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out_8(&port->lcr, old_lcr);
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/* calculate speed */
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speed = (clock / prescaler) / (divisor * 16);
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/* sanity check */
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if (speed > (clock / 16))
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speed = 9600;
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return speed;
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}
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#ifdef CONFIG_PPC_MAPLE
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void udbg_maple_real_flush(void)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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void udbg_maple_real_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_maple_real_putc('\r');
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udbg_maple_real_flush();
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real_writeb(c, &udbg_comport->thr); eieio();
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}
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}
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void __init udbg_init_maple_realmode(void)
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{
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udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
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udbg_putc = udbg_maple_real_putc;
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udbg_flush = udbg_maple_real_flush;
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udbg_getc = NULL;
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udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_MAPLE */
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#ifdef CONFIG_PPC_PASEMI
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void udbg_pas_real_flush(void)
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{
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if (udbg_comport) {
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while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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void udbg_pas_real_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_pas_real_putc('\r');
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udbg_pas_real_flush();
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real_205_writeb(c, &udbg_comport->thr); eieio();
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}
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}
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void udbg_init_pas_realmode(void)
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{
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udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
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udbg_putc = udbg_pas_real_putc;
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udbg_flush = udbg_pas_real_flush;
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udbg_getc = NULL;
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udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_MAPLE */
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#ifdef CONFIG_PPC_EARLY_DEBUG_44x
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#include <platforms/44x/44x.h>
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static void udbg_44x_as1_flush(void)
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{
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if (udbg_comport) {
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while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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static void udbg_44x_as1_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_44x_as1_putc('\r');
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udbg_44x_as1_flush();
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as1_writeb(c, &udbg_comport->thr); eieio();
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}
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}
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static int udbg_44x_as1_getc(void)
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{
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if (udbg_comport) {
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while ((as1_readb(&udbg_comport->lsr) & LSR_DR) == 0)
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; /* wait for char */
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return as1_readb(&udbg_comport->rbr);
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}
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return -1;
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}
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void __init udbg_init_44x_as1(void)
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{
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udbg_comport =
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(struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
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udbg_putc = udbg_44x_as1_putc;
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udbg_flush = udbg_44x_as1_flush;
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udbg_getc = udbg_44x_as1_getc;
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}
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#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
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#ifdef CONFIG_PPC_EARLY_DEBUG_40x
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static void udbg_40x_real_flush(void)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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static void udbg_40x_real_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_40x_real_putc('\r');
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udbg_40x_real_flush();
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real_writeb(c, &udbg_comport->thr); eieio();
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}
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}
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static int udbg_40x_real_getc(void)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_DR) == 0)
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; /* wait for char */
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return real_readb(&udbg_comport->rbr);
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}
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return -1;
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}
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void __init udbg_init_40x_realmode(void)
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{
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udbg_comport = (struct NS16550 __iomem *)
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CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
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udbg_putc = udbg_40x_real_putc;
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udbg_flush = udbg_40x_real_flush;
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udbg_getc = udbg_40x_real_getc;
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udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
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#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
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static void udbg_wsp_flush(void)
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{
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if (udbg_comport) {
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while ((readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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}
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}
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static void udbg_wsp_putc(char c)
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{
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if (udbg_comport) {
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if (c == '\n')
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udbg_wsp_putc('\r');
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udbg_wsp_flush();
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writeb(c, &udbg_comport->thr); eieio();
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}
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}
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static int udbg_wsp_getc(void)
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{
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if (udbg_comport) {
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while ((readb(&udbg_comport->lsr) & LSR_DR) == 0)
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; /* wait for char */
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return readb(&udbg_comport->rbr);
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}
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return -1;
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}
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static int udbg_wsp_getc_poll(void)
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{
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if (udbg_comport)
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if (readb(&udbg_comport->lsr) & LSR_DR)
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return readb(&udbg_comport->rbr);
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return -1;
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}
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void __init udbg_init_wsp(void)
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{
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udbg_comport = (struct NS16550 __iomem *)WSP_UART_VIRT;
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udbg_init_uart(udbg_comport, 57600, 50000000);
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udbg_putc = udbg_wsp_putc;
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udbg_flush = udbg_wsp_flush;
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udbg_getc = udbg_wsp_getc;
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udbg_getc_poll = udbg_wsp_getc_poll;
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}
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#endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
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