134 lines
3.5 KiB
C
134 lines
3.5 KiB
C
/*
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* Copyright (c) 2016 Maxime Ripard. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CCU_DIV_H_
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#define _CCU_DIV_H_
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#include <linux/clk-provider.h>
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#include "ccu_common.h"
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#include "ccu_mux.h"
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struct _ccu_div {
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u8 shift;
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u8 width;
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u32 flags;
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struct clk_div_table *table;
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};
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#define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \
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{ \
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.shift = _shift, \
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.width = _width, \
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.flags = _flags, \
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.table = _table, \
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}
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#define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \
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_SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, NULL, _flags)
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#define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \
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_SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0)
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#define _SUNXI_CCU_DIV(_shift, _width) \
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_SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, NULL, 0)
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struct ccu_div {
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u32 enable;
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struct _ccu_div div;
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struct ccu_mux_internal mux;
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struct ccu_common common;
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};
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#define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
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_shift, _width, \
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_table, _gate, _flags) \
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struct ccu_div _struct = { \
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.div = _SUNXI_CCU_DIV_TABLE(_shift, _width, \
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_table), \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT(_name, \
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_parent, \
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&ccu_div_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \
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_shift, _width, \
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_table, _flags) \
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SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
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_shift, _width, _table, 0, \
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_flags)
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#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
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_mshift, _mwidth, _muxshift, _muxwidth, \
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_gate, _flags) \
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struct ccu_div _struct = { \
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.enable = _gate, \
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.div = _SUNXI_CCU_DIV(_mshift, _mwidth), \
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.mux = SUNXI_CLK_MUX(_muxshift, _muxwidth), \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT_PARENTS(_name, \
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_parents, \
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&ccu_div_ops, \
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_flags), \
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}, \
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}
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#define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \
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_mshift, _mwidth, _muxshift, _muxwidth, \
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_flags) \
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SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
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_mshift, _mwidth, _muxshift, _muxwidth, \
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0, _flags)
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#define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
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_mshift, _mwidth, _gate, \
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_flags) \
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struct ccu_div _struct = { \
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.enable = _gate, \
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.div = _SUNXI_CCU_DIV(_mshift, _mwidth), \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT(_name, \
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_parent, \
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&ccu_div_ops, \
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_flags), \
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}, \
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}
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#define SUNXI_CCU_M(_struct, _name, _parent, _reg, _mshift, _mwidth, \
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_flags) \
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SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
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_mshift, _mwidth, 0, _flags)
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static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw)
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{
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struct ccu_common *common = hw_to_ccu_common(hw);
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return container_of(common, struct ccu_div, common);
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}
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extern const struct clk_ops ccu_div_ops;
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#endif /* _CCU_DIV_H_ */
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