349 lines
7.5 KiB
ArmAsm
349 lines
7.5 KiB
ArmAsm
/*
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* vmlinux.lds.S -- master linker script for m68knommu arch
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*
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* (C) Copyright 2002-2004, Greg Ungerer <gerg@snapgear.com>
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*
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* This ends up looking compilcated, because of the number of
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* address variations for ram and rom/flash layouts. The real
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* work of the linker script is all at the end, and reasonably
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* strait forward.
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*/
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#include <linux/config.h>
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#include <asm-generic/vmlinux.lds.h>
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/*
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* Original Palm pilot (same for Xcopilot).
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* There is really only a rom target for this.
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*/
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#ifdef CONFIG_PILOT3
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#define ROMVEC_START 0x10c00000
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#define ROMVEC_LENGTH 0x10400
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#define ROM_START 0x10c10400
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#define ROM_LENGTH 0xfec00
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#define ROM_END 0x10d00000
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#define RAMVEC_START 0x00000000
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#define RAMVEC_LENGTH 0x400
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#define RAM_START 0x10000400
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#define RAM_LENGTH 0xffc00
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#define RAM_END 0x10100000
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#define _ramend _ram_end_notused
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#define DATA_ADDR RAM_START
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#endif
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/*
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* Same setup on both the uCsimm and uCdimm.
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*/
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#if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM)
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#ifdef CONFIG_RAMKERNEL
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#define ROMVEC_START 0x10c10000
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#define ROMVEC_LENGTH 0x400
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#define ROM_START 0x10c10400
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#define ROM_LENGTH 0x1efc00
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#define ROM_END 0x10e00000
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#define RAMVEC_START 0x00000000
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#define RAMVEC_LENGTH 0x400
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#define RAM_START 0x00020400
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#define RAM_LENGTH 0x7dfc00
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#define RAM_END 0x00800000
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#endif
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#ifdef CONFIG_ROMKERNEL
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#define ROMVEC_START 0x10c10000
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#define ROMVEC_LENGTH 0x400
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#define ROM_START 0x10c10400
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#define ROM_LENGTH 0x1efc00
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#define ROM_END 0x10e00000
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#define RAMVEC_START 0x00000000
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#define RAMVEC_LENGTH 0x400
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#define RAM_START 0x00020000
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#define RAM_LENGTH 0x600000
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#define RAM_END 0x00800000
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#endif
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#ifdef CONFIG_HIMEMKERNEL
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#define ROMVEC_START 0x00600000
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#define ROMVEC_LENGTH 0x400
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#define ROM_START 0x00600400
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#define ROM_LENGTH 0x1efc00
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#define ROM_END 0x007f0000
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#define RAMVEC_START 0x00000000
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#define RAMVEC_LENGTH 0x400
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#define RAM_START 0x00020000
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#define RAM_LENGTH 0x5e0000
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#define RAM_END 0x00600000
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#endif
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#endif
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#ifdef CONFIG_DRAGEN2
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#define RAM_START 0x10000
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#define RAM_LENGTH 0x7f0000
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#endif
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#ifdef CONFIG_UCQUICC
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#define ROMVEC_START 0x00000000
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#define ROMVEC_LENGTH 0x404
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#define ROM_START 0x00000404
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#define ROM_LENGTH 0x1ff6fc
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#define ROM_END 0x00200000
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#define RAMVEC_START 0x00200000
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#define RAMVEC_LENGTH 0x404
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#define RAM_START 0x00200404
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#define RAM_LENGTH 0x1ff6fc
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#define RAM_END 0x00400000
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#endif
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/*
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* The standard Arnewsh 5206 board only has 1MiB of ram. Not normally
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* enough to be useful. Assume the user has fitted something larger,
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* at least 4MiB in size. No point in not letting the kernel completely
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* link, it will be obvious if it is too big when they go to load it.
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*/
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#if defined(CONFIG_ARN5206)
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#define RAM_START 0x10000
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#define RAM_LENGTH 0x3f0000
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#endif
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/*
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* The Motorola 5206eLITE board only has 1MiB of static RAM.
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*/
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#if defined(CONFIG_ELITE)
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#define RAM_START 0x30020000
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#define RAM_END 0xe0000
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#endif
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/*
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* All the Motorola eval boards have the same basic arrangement.
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* The end of RAM will vary depending on how much ram is fitted,
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* but this isn't important here, we assume at least 4MiB.
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*/
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#if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
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defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
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defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
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defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB)
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#define RAM_START 0x20000
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#define RAM_LENGTH 0x3e0000
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#endif
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/*
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* The senTec COBRA5272 board has nearly the same memory layout as
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* the M5272C3. We assume 16MiB ram.
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*/
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#if defined(CONFIG_COBRA5272)
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#define RAM_START 0x20000
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#define RAM_LENGTH 0xfe0000
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#endif
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#if defined(CONFIG_M5282EVB)
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#define RAM_START 0x10000
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#define RAM_LENGTH 0x3f0000
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#endif
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/*
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* The senTec COBRA5282 board has the same memory layout as the M5282EVB.
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*/
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#if defined(CONFIG_COBRA5282)
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#define RAM_START 0x10000
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#define RAM_LENGTH 0x3f0000
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#endif
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/*
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* These flash boot boards use all of ram for operation. Again the
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* actual memory size is not important here, assume at least 4MiB.
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* They currently have no support for running in flash.
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*/
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#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
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defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
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defined(CONFIG_HW_FEITH)
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#define RAM_START 0x400
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#define RAM_LENGTH 0x3ffc00
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#endif
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/*
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* Sneha Boards mimimun memmory
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* The end of RAM will vary depending on how much ram is fitted,
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* but this isn't important here, we assume at least 4MiB.
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*/
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#if defined(CONFIG_CPU16B)
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#define RAM_START 0x20000
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#define RAM_LENGTH 0x3e0000
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#endif
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#if defined(CONFIG_RAMKERNEL)
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#define TEXT ram
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#define DATA ram
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#define INIT ram
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#define BSS ram
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#endif
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#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
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#define TEXT rom
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#define DATA ram
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#define INIT ram
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#define BSS ram
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#endif
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#ifndef DATA_ADDR
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#define DATA_ADDR
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#endif
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OUTPUT_ARCH(m68k)
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ENTRY(_start)
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MEMORY {
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#ifdef RAMVEC_START
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ramvec : ORIGIN = RAMVEC_START, LENGTH = RAMVEC_LENGTH
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#endif
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ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
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#ifdef RAM_END
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eram : ORIGIN = RAM_END, LENGTH = 0
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#endif
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#ifdef ROM_START
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romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
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rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
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erom : ORIGIN = ROM_END, LENGTH = 0
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#endif
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}
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jiffies = jiffies_64 + 4;
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SECTIONS {
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#ifdef ROMVEC_START
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. = ROMVEC_START ;
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.romvec : {
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__rom_start = . ;
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_romvec = .;
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*(.data.initvect)
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} > romvec
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#endif
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.text : {
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_stext = . ;
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*(.text)
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SCHED_TEXT
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*(.text.lock)
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. = ALIGN(16); /* Exception table */
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__start___ex_table = .;
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*(__ex_table)
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__stop___ex_table = .;
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*(.rodata) *(.rodata.*)
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*(__vermagic) /* Kernel version magic */
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*(.rodata1)
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*(.rodata.str1.1)
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/* Kernel symbol table: Normal symbols */
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. = ALIGN(4);
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__start___ksymtab = .;
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*(__ksymtab)
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__stop___ksymtab = .;
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/* Kernel symbol table: GPL-only symbols */
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__start___ksymtab_gpl = .;
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*(__ksymtab_gpl)
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__stop___ksymtab_gpl = .;
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/* Kernel symbol table: Normal symbols */
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__start___kcrctab = .;
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*(__kcrctab)
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__stop___kcrctab = .;
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/* Kernel symbol table: GPL-only symbols */
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__start___kcrctab_gpl = .;
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*(__kcrctab_gpl)
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__stop___kcrctab_gpl = .;
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/* Kernel symbol table: strings */
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*(__ksymtab_strings)
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/* Built-in module parameters */
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__start___param = .;
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*(__param)
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__stop___param = .;
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. = ALIGN(4) ;
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_etext = . ;
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} > TEXT
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#ifdef ROM_END
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. = ROM_END ;
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.erom : {
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__rom_end = . ;
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} > erom
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#endif
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#ifdef RAMVEC_START
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. = RAMVEC_START ;
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.ramvec : {
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__ramvec = .;
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} > ramvec
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#endif
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.data DATA_ADDR : {
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. = ALIGN(4);
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_sdata = . ;
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*(.data)
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. = ALIGN(8192) ;
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*(.data.init_task)
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_edata = . ;
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} > DATA
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.init : {
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. = ALIGN(4096);
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__init_begin = .;
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_sinittext = .;
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*(.init.text)
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_einittext = .;
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*(.init.data)
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. = ALIGN(16);
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__setup_start = .;
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*(.init.setup)
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__setup_end = .;
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__initcall_start = .;
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*(.initcall1.init)
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*(.initcall2.init)
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*(.initcall3.init)
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*(.initcall4.init)
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*(.initcall5.init)
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*(.initcall6.init)
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*(.initcall7.init)
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__initcall_end = .;
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__con_initcall_start = .;
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*(.con_initcall.init)
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__con_initcall_end = .;
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__security_initcall_start = .;
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*(.security_initcall.init)
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__security_initcall_end = .;
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. = ALIGN(4);
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__initramfs_start = .;
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*(.init.ramfs)
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__initramfs_end = .;
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. = ALIGN(4096);
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__init_end = .;
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} > INIT
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/DISCARD/ : {
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*(.exit.text)
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*(.exit.data)
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*(.exitcall.exit)
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}
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.bss : {
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. = ALIGN(4);
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_sbss = . ;
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*(.bss)
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*(COMMON)
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. = ALIGN(4) ;
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_ebss = . ;
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} > BSS
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#ifdef RAM_END
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. = RAM_END ;
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.eram : {
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__ramend = . ;
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_ramend = . ;
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} > eram
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#endif
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}
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