241 lines
6.1 KiB
C
241 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
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* Author: Lin Huang <hl@rock-chips.com>
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*/
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#include <linux/clk.h>
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#include <linux/devfreq-event.h>
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <soc/rockchip/rk3399_grf.h>
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#define RK3399_DMC_NUM_CH 2
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/* DDRMON_CTRL */
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#define DDRMON_CTRL 0x04
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#define CLR_DDRMON_CTRL (0x1f0000 << 0)
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#define LPDDR4_EN (0x10001 << 4)
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#define HARDWARE_EN (0x10001 << 3)
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#define LPDDR3_EN (0x10001 << 2)
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#define SOFTWARE_EN (0x10001 << 1)
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#define SOFTWARE_DIS (0x10000 << 1)
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#define TIME_CNT_EN (0x10001 << 0)
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#define DDRMON_CH0_COUNT_NUM 0x28
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#define DDRMON_CH0_DFI_ACCESS_NUM 0x2c
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#define DDRMON_CH1_COUNT_NUM 0x3c
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#define DDRMON_CH1_DFI_ACCESS_NUM 0x40
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struct dmc_usage {
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u32 access;
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u32 total;
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};
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/*
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* The dfi controller can monitor DDR load. It has an upper and lower threshold
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* for the operating points. Whenever the usage leaves these bounds an event is
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* generated to indicate the DDR frequency should be changed.
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*/
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struct rockchip_dfi {
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struct devfreq_event_dev *edev;
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struct devfreq_event_desc *desc;
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struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
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struct device *dev;
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void __iomem *regs;
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struct regmap *regmap_pmu;
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struct clk *clk;
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};
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static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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void __iomem *dfi_regs = info->regs;
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u32 val;
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u32 ddr_type;
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/* get ddr type */
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regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
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ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
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RK3399_PMUGRF_DDRTYPE_MASK;
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/* clear DDRMON_CTRL setting */
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writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
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/* set ddr type to dfi */
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if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
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writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
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else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
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writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
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/* enable count, use software mode */
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writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
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}
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static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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void __iomem *dfi_regs = info->regs;
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writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
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}
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static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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u32 tmp, max = 0;
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u32 i, busier_ch = 0;
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void __iomem *dfi_regs = info->regs;
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rockchip_dfi_stop_hardware_counter(edev);
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/* Find out which channel is busier */
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for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
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info->ch_usage[i].access = readl_relaxed(dfi_regs +
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DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4;
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info->ch_usage[i].total = readl_relaxed(dfi_regs +
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DDRMON_CH0_COUNT_NUM + i * 20);
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tmp = info->ch_usage[i].access;
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if (tmp > max) {
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busier_ch = i;
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max = tmp;
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}
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}
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rockchip_dfi_start_hardware_counter(edev);
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return busier_ch;
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}
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static int rockchip_dfi_disable(struct devfreq_event_dev *edev)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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rockchip_dfi_stop_hardware_counter(edev);
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clk_disable_unprepare(info->clk);
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return 0;
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}
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static int rockchip_dfi_enable(struct devfreq_event_dev *edev)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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int ret;
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ret = clk_prepare_enable(info->clk);
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if (ret) {
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dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret);
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return ret;
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}
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rockchip_dfi_start_hardware_counter(edev);
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return 0;
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}
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static int rockchip_dfi_set_event(struct devfreq_event_dev *edev)
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{
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return 0;
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}
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static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
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struct devfreq_event_data *edata)
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{
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struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
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int busier_ch;
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busier_ch = rockchip_dfi_get_busier_ch(edev);
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edata->load_count = info->ch_usage[busier_ch].access;
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edata->total_count = info->ch_usage[busier_ch].total;
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return 0;
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}
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static const struct devfreq_event_ops rockchip_dfi_ops = {
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.disable = rockchip_dfi_disable,
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.enable = rockchip_dfi_enable,
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.get_event = rockchip_dfi_get_event,
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.set_event = rockchip_dfi_set_event,
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};
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static const struct of_device_id rockchip_dfi_id_match[] = {
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{ .compatible = "rockchip,rk3399-dfi" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match);
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static int rockchip_dfi_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rockchip_dfi *data;
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struct resource *res;
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struct devfreq_event_desc *desc;
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struct device_node *np = pdev->dev.of_node, *node;
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data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->regs))
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return PTR_ERR(data->regs);
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data->clk = devm_clk_get(dev, "pclk_ddr_mon");
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if (IS_ERR(data->clk)) {
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dev_err(dev, "Cannot get the clk dmc_clk\n");
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return PTR_ERR(data->clk);
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}
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/* try to find the optional reference to the pmu syscon */
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node = of_parse_phandle(np, "rockchip,pmu", 0);
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if (node) {
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data->regmap_pmu = syscon_node_to_regmap(node);
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if (IS_ERR(data->regmap_pmu))
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return PTR_ERR(data->regmap_pmu);
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}
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data->dev = dev;
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desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
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if (!desc)
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return -ENOMEM;
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desc->ops = &rockchip_dfi_ops;
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desc->driver_data = data;
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desc->name = np->name;
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data->desc = desc;
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data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc);
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if (IS_ERR(data->edev)) {
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dev_err(&pdev->dev,
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"failed to add devfreq-event device\n");
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return PTR_ERR(data->edev);
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}
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platform_set_drvdata(pdev, data);
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return 0;
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}
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static struct platform_driver rockchip_dfi_driver = {
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.probe = rockchip_dfi_probe,
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.driver = {
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.name = "rockchip-dfi",
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.of_match_table = rockchip_dfi_id_match,
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},
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};
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module_platform_driver(rockchip_dfi_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Lin Huang <hl@rock-chips.com>");
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MODULE_DESCRIPTION("Rockchip DFI driver");
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