204 lines
6.0 KiB
C
204 lines
6.0 KiB
C
/*
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* Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
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* Portions (C) Copyright 2002 Red Hat Inc
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* For the avoidance of doubt the "preferred form" of this code is one which
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* is in an open non patent encumbered format. Where cryptographic key signing
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* forms part of the process of creating an executable the information
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* including keys needed to generate an equivalently functional executable
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* are deemed to be part of the source code.
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#define DRV_NAME "ide_pci_generic"
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static bool ide_generic_all; /* Set to claim all devices */
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module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
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MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
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static void netcell_quirkproc(ide_drive_t *drive)
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{
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/* mark words 85-87 as valid */
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drive->id[ATA_ID_CSF_DEFAULT] |= 0x4000;
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}
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static const struct ide_port_ops netcell_port_ops = {
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.quirkproc = netcell_quirkproc,
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};
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#define DECLARE_GENERIC_PCI_DEV(extra_flags) \
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{ \
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.name = DRV_NAME, \
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.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
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extra_flags, \
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.swdma_mask = ATA_SWDMA2, \
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.mwdma_mask = ATA_MWDMA2, \
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.udma_mask = ATA_UDMA6, \
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}
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static const struct ide_port_info generic_chipsets[] = {
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/* 0: Unknown */
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DECLARE_GENERIC_PCI_DEV(0),
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{ /* 1: NS87410 */
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.name = DRV_NAME,
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.enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
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.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
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.swdma_mask = ATA_SWDMA2,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA6,
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},
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/* 2: SAMURAI / HT6565 / HINT_IDE */
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DECLARE_GENERIC_PCI_DEV(0),
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/* 3: UM8673F / UM8886A / UM8886BF */
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DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_DMA),
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/* 4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
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DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),
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{ /* 5: VIA8237SATA */
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.name = DRV_NAME,
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.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
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IDE_HFLAG_OFF_BOARD,
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.swdma_mask = ATA_SWDMA2,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA6,
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},
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{ /* 6: Revolution */
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.name = DRV_NAME,
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.port_ops = &netcell_port_ops,
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.host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
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IDE_HFLAG_TRUST_BIOS_FOR_DMA |
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IDE_HFLAG_OFF_BOARD,
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.swdma_mask = ATA_SWDMA2,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA6,
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}
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};
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/**
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* generic_init_one - called when a PIIX is found
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* @dev: the generic device
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* @id: the matching pci id
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*
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* Called when the PCI registration layer (or the IDE initialization)
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* finds a device matching our IDE device tables.
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*/
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static int generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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const struct ide_port_info *d = &generic_chipsets[id->driver_data];
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int ret = -ENODEV;
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/* Don't use the generic entry unless instructed to do so */
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if (id->driver_data == 0 && ide_generic_all == 0)
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goto out;
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switch (dev->vendor) {
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case PCI_VENDOR_ID_UMC:
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if (dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
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!(PCI_FUNC(dev->devfn) & 1))
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goto out; /* UM8886A/BF pair */
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break;
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case PCI_VENDOR_ID_OPTI:
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if (dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
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!(PCI_FUNC(dev->devfn) & 1))
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goto out;
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break;
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case PCI_VENDOR_ID_JMICRON:
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if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 &&
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PCI_FUNC(dev->devfn) != 1)
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goto out;
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break;
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case PCI_VENDOR_ID_NS:
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if (dev->device == PCI_DEVICE_ID_NS_87410 &&
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(dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
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goto out;
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break;
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}
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if (dev->vendor != PCI_VENDOR_ID_JMICRON) {
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u16 command;
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pci_read_config_word(dev, PCI_COMMAND, &command);
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if (!(command & PCI_COMMAND_IO)) {
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printk(KERN_INFO "%s %s: skipping disabled "
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"controller\n", d->name, pci_name(dev));
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goto out;
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}
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}
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ret = ide_pci_init_one(dev, d, NULL);
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out:
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return ret;
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}
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static const struct pci_device_id generic_pci_tbl[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 },
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{ PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 },
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{ PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 2 },
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{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 3 },
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{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 3 },
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{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 3 },
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{ PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 2 },
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{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 4 },
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{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 4 },
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#ifdef CONFIG_BLK_DEV_IDE_SATA
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{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 5 },
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#endif
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{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 4 },
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{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 4 },
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{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), 4 },
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{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), 4 },
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{ PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 6 },
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/*
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* Must come last. If you add entries adjust
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* this table and generic_chipsets[] appropriately.
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*/
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, generic_pci_tbl);
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static struct pci_driver generic_pci_driver = {
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.name = "PCI_IDE",
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.id_table = generic_pci_tbl,
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.probe = generic_init_one,
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.remove = ide_pci_remove,
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.suspend = ide_pci_suspend,
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.resume = ide_pci_resume,
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};
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static int __init generic_ide_init(void)
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{
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return ide_pci_register_driver(&generic_pci_driver);
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}
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static void __exit generic_ide_exit(void)
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{
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pci_unregister_driver(&generic_pci_driver);
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}
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module_init(generic_ide_init);
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module_exit(generic_ide_exit);
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MODULE_AUTHOR("Andre Hedrick");
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MODULE_DESCRIPTION("PCI driver module for generic PCI IDE");
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MODULE_LICENSE("GPL");
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