Christoph Hellwig e28dcc77e8 riscv: remove unreachable big endian code ... RISC-V is always little endian. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2019-04-25 14:51:10 -07:00
..
boot	RISC-V: Build flat and compressed kernel images	2018-11-20 05:19:09 -08:00
configs	RISC-V: Add separate defconfig for 32bit systems	2019-04-09 09:42:49 -07:00
include	riscv: remove unreachable big endian code	2019-04-25 14:51:10 -07:00
kernel	riscv/signal: Fixup additional syscall restarting	2019-04-25 11:07:36 -07:00
lib	RISC-V: lib: minor asm cleanup	2018-12-21 08:17:02 -08:00
mm	RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems	2019-04-10 09:41:40 -07:00
net	bpf, riscv: add BPF JIT for RV64G	2019-02-05 16:56:10 +01:00
Kconfig	DMA mapping updates for 5.1	2019-03-10 11:54:48 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Makefile	bpf, riscv: add BPF JIT for RV64G	2019-02-05 16:56:10 +01:00