Samuel Holland b008e327fa riscv: Fix loading 64-bit NOMMU kernels past the start of RAM ... [ Upstream commit aea702dde7e9876fb00571a2602f25130847bf0f ] commit 3335068f87 ("riscv: Use PUD/P4D/PGD pages for the linear mapping") added logic to allow using RAM below the kernel load address. However, this does not work for NOMMU, where PAGE_OFFSET is fixed to the kernel load address. Since that range of memory corresponds to PFNs below ARCH_PFN_OFFSET, mm initialization runs off the beginning of mem_map and corrupts adjacent kernel memory. Fix this by restoring the previous behavior for NOMMU kernels. Fixes: 3335068f87 ("riscv: Use PUD/P4D/PGD pages for the linear mapping") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20240227003630.3634533-3-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2024-05-02 16:32:49 +02:00
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Makefile	riscv: split cache ops out of dma-noncoherent.c	2023-11-28 17:19:49 +00:00
cache-ops.c	riscv: split cache ops out of dma-noncoherent.c	2023-11-28 17:19:49 +00:00
cacheflush.c	riscv: implement the new page table range API	2023-08-24 16:20:23 -07:00
context.c	riscv: mm: use bitmap_zero() API	2023-08-31 00:18:29 -07:00
dma-noncoherent.c	riscv: split cache ops out of dma-noncoherent.c	2023-11-28 17:19:49 +00:00
extable.c	riscv: extable: fix err reg writing in dedicated uaccess handler	2022-02-08 17:02:47 -08:00
fault.c	riscv: handle VM_FAULT_[HWPOISON|HWPOISON_LARGE] faults instead of panicking	2023-10-06 14:11:38 -07:00
hugetlbpage.c	riscv: Fix build error if !CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION	2024-03-06 14:48:37 +00:00
init.c	riscv: Fix loading 64-bit NOMMU kernels past the start of RAM	2024-05-02 16:32:49 +02:00
kasan_init.c	RISC-V Patches for the 6.6 Merge Window, Part 1	2023-09-01 08:09:48 -07:00
pageattr.c	riscv: Fix wrong usage of lm_alias() when splitting a huge linear mapping	2024-01-25 15:36:01 -08:00
pgtable.c	riscv: mm: Implement pmdp_collapse_flush for THP	2023-02-01 20:52:09 -08:00
physaddr.c	riscv: Use PUD/P4D/PGD pages for the linear mapping	2023-04-18 20:43:04 -07:00
pmem.c	riscv: mm: dma-noncoherent: nonstandard cache operations support	2023-09-01 09:08:57 -07:00
ptdump.c	riscv: correct pt_level name via pgtable_l5/4_enabled	2023-11-28 17:20:13 +00:00
tlbflush.c	riscv: mm: execute local TLB flush after populating vmemmap	2024-02-16 19:10:52 +01:00