192 lines
5.0 KiB
C
192 lines
5.0 KiB
C
/*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2009 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include "soc.h"
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#include "omap_hwmod.h"
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#include "omap_device.h"
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#include "omap-pm.h"
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#include "prm.h"
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#include "common.h"
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#include "mux.h"
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#include "i2c.h"
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/* In register I2C_CON, Bit 15 is the I2C enable bit */
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#define I2C_EN BIT(15)
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#define OMAP2_I2C_CON_OFFSET 0x24
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#define OMAP4_I2C_CON_OFFSET 0xA4
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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static void __init omap2_i2c_mux_pins(int bus_id)
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{
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char mux_name[sizeof("i2c2_scl.i2c2_scl")];
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/* First I2C bus is not muxable */
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if (bus_id == 1)
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return;
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sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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}
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/**
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* omap_i2c_reset - reset the omap i2c module.
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* @oh: struct omap_hwmod *
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*
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* The i2c moudle in omap2, omap3 had a special sequence to reset. The
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* sequence is:
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* - Disable the I2C.
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* - Write to SOFTRESET bit.
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* - Enable the I2C.
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* - Poll on the RESETDONE bit.
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* The sequence is implemented in below function. This is called for 2420,
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* 2430 and omap3.
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*/
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int omap_i2c_reset(struct omap_hwmod *oh)
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{
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u32 v;
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u16 i2c_con;
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int c = 0;
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if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
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i2c_con = OMAP4_I2C_CON_OFFSET;
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} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
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i2c_con = OMAP2_I2C_CON_OFFSET;
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} else {
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WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
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oh->name);
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return -EINVAL;
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}
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/* Disable I2C */
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v = omap_hwmod_read(oh, i2c_con);
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v &= ~I2C_EN;
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omap_hwmod_write(v, oh, i2c_con);
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/* Write to the SOFTRESET bit */
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omap_hwmod_softreset(oh);
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/* Enable I2C */
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v = omap_hwmod_read(oh, i2c_con);
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v |= I2C_EN;
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omap_hwmod_write(v, oh, i2c_con);
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/* Poll on RESETDONE bit */
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omap_test_timeout((omap_hwmod_read(oh,
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oh->class->sysc->syss_offs)
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& SYSS_RESETDONE_MASK),
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MAX_MODULE_SOFTRESET_WAIT, c);
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if (c == MAX_MODULE_SOFTRESET_WAIT)
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pr_warn("%s: %s: softreset failed (waited %d usec)\n",
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__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
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else
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pr_debug("%s: %s: softreset in %d usec\n", __func__,
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oh->name, c);
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return 0;
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}
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static int __init omap_i2c_nr_ports(void)
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{
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int ports = 0;
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if (cpu_is_omap24xx())
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ports = 2;
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else if (cpu_is_omap34xx())
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ports = 3;
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else if (cpu_is_omap44xx())
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ports = 4;
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return ports;
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}
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/*
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* XXX This function is a temporary compatibility wrapper - only
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* needed until the I2C driver can be converted to call
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* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
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*/
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static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
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{
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omap_pm_set_max_mpu_wakeup_lat(dev, t);
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}
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static const char name[] = "omap_i2c";
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int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
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int bus_id)
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{
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int l;
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
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struct omap_i2c_bus_platform_data *pdata;
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struct omap_i2c_dev_attr *dev_attr;
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if (bus_id > omap_i2c_nr_ports())
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return -EINVAL;
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omap2_i2c_mux_pins(bus_id);
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l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
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WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
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"String buffer overflow in I2C%d device setup\n", bus_id);
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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pr_err("Could not look up %s\n", oh_name);
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return -EEXIST;
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}
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pdata = i2c_pdata;
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/*
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* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
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* use, and functionality implementation flags, up to the OMAP I2C
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* driver via platform data
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*/
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pdata->rev = oh->class->rev;
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dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
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pdata->flags = dev_attr->flags;
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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* Only omap3 has support for constraints
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*/
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if (cpu_is_omap34xx())
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pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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pdev = omap_device_build(name, bus_id, oh, pdata,
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sizeof(struct omap_i2c_bus_platform_data));
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WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
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return PTR_ERR_OR_ZERO(pdev);
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}
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static int __init omap_i2c_cmdline(void)
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{
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return omap_register_i2c_bus_cmdline();
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}
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omap_subsys_initcall(omap_i2c_cmdline);
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