168 lines
4.5 KiB
C
168 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DPU_HW_TOP_H
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#define _DPU_HW_TOP_H
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#include "dpu_hw_catalog.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_util.h"
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#include "dpu_hw_blk.h"
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struct dpu_hw_mdp;
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/**
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* struct traffic_shaper_cfg: traffic shaper configuration
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* @en : enable/disable traffic shaper
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* @rd_client : true if read client; false if write client
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* @client_id : client identifier
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* @bpc_denom : denominator of byte per clk
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* @bpc_numer : numerator of byte per clk
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*/
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struct traffic_shaper_cfg {
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bool en;
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bool rd_client;
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u32 client_id;
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u32 bpc_denom;
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u64 bpc_numer;
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};
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/**
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* struct split_pipe_cfg - pipe configuration for dual display panels
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* @en : Enable/disable dual pipe confguration
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* @mode : Panel interface mode
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* @intf : Interface id for main control path
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* @split_flush_en: Allows both the paths to be flushed when master path is
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* flushed
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*/
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struct split_pipe_cfg {
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bool en;
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enum dpu_intf_mode mode;
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enum dpu_intf intf;
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bool split_flush_en;
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};
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/**
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* struct dpu_danger_safe_status: danger and safe status signals
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* @mdp: top level status
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* @sspp: source pipe status
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*/
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struct dpu_danger_safe_status {
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u8 mdp;
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u8 sspp[SSPP_MAX];
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};
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/**
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* struct dpu_vsync_source_cfg - configure vsync source and configure the
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* watchdog timers if required.
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* @pp_count: number of ping pongs active
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* @frame_rate: Display frame rate
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* @ppnumber: ping pong index array
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* @vsync_source: vsync source selection
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*/
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struct dpu_vsync_source_cfg {
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u32 pp_count;
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u32 frame_rate;
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u32 ppnumber[PINGPONG_MAX];
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u32 vsync_source;
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};
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/**
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* struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions
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* Assumption is these functions will be called after clocks are enabled.
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* @setup_split_pipe : Programs the pipe control registers
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* @setup_pp_split : Programs the pp split control registers
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* @setup_traffic_shaper : programs traffic shaper control
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*/
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struct dpu_hw_mdp_ops {
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/** setup_split_pipe() : Regsiters are not double buffered, thisk
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* function should be called before timing control enable
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* @mdp : mdp top context driver
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* @cfg : upper and lower part of pipe configuration
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*/
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void (*setup_split_pipe)(struct dpu_hw_mdp *mdp,
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struct split_pipe_cfg *p);
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/**
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* setup_traffic_shaper() : Setup traffic shaper control
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* @mdp : mdp top context driver
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* @cfg : traffic shaper configuration
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*/
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void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp,
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struct traffic_shaper_cfg *cfg);
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/**
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* setup_clk_force_ctrl - set clock force control
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* @mdp: mdp top context driver
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* @clk_ctrl: clock to be controlled
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* @enable: force on enable
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* @return: if the clock is forced-on by this function
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*/
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bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp,
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enum dpu_clk_ctrl_type clk_ctrl, bool enable);
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/**
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* get_danger_status - get danger status
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* @mdp: mdp top context driver
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* @status: Pointer to danger safe status
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*/
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void (*get_danger_status)(struct dpu_hw_mdp *mdp,
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struct dpu_danger_safe_status *status);
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/**
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* setup_vsync_source - setup vsync source configuration details
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* @mdp: mdp top context driver
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* @cfg: vsync source selection configuration
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*/
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void (*setup_vsync_source)(struct dpu_hw_mdp *mdp,
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struct dpu_vsync_source_cfg *cfg);
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/**
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* get_safe_status - get safe status
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* @mdp: mdp top context driver
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* @status: Pointer to danger safe status
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*/
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void (*get_safe_status)(struct dpu_hw_mdp *mdp,
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struct dpu_danger_safe_status *status);
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/**
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* reset_ubwc - reset top level UBWC configuration
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* @mdp: mdp top context driver
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* @m: pointer to mdss catalog data
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*/
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void (*reset_ubwc)(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m);
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/**
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* intf_audio_select - select the external interface for audio
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* @mdp: mdp top context driver
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*/
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void (*intf_audio_select)(struct dpu_hw_mdp *mdp);
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};
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struct dpu_hw_mdp {
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struct dpu_hw_blk base;
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struct dpu_hw_blk_reg_map hw;
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/* top */
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enum dpu_mdp idx;
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const struct dpu_mdp_cfg *caps;
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/* ops */
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struct dpu_hw_mdp_ops ops;
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};
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/**
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* dpu_hw_mdptop_init - initializes the top driver for the passed idx
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* @idx: Interface index for which driver object is required
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* @addr: Mapped register io address of MDP
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* @m: Pointer to mdss catalog data
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*/
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struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
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void __iomem *addr,
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const struct dpu_mdss_cfg *m);
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void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp);
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#endif /*_DPU_HW_TOP_H */
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