54 lines
1.9 KiB
Plaintext
54 lines
1.9 KiB
Plaintext
config USB_DWC2
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tristate "DesignWare USB2 DRD Core Support"
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depends on USB
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help
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Say Y or M here if your system has a Dual Role HighSpeed
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USB controller based on the DesignWare HSOTG IP Core.
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If you choose to build this driver as dynamically linked
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modules, the core module will be called dwc2.ko, the
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PCI bus interface module (if you have a PCI bus system)
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will be called dwc2_pci.ko and the platform interface module
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(for controllers directly connected to the CPU) will be called
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dwc2_platform.ko.
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NOTE: This driver at present only implements the Host mode
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of the controller. The existing s3c-hsotg driver supports
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Peripheral mode, but only for the Samsung S3C platforms.
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There are plans to merge the s3c-hsotg driver with this
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driver in the near future to create a dual-role driver.
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if USB_DWC2
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config USB_DWC2_DEBUG
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bool "Enable Debugging Messages"
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help
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Say Y here to enable debugging messages in the DWC2 Driver.
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config USB_DWC2_VERBOSE
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bool "Enable Verbose Debugging Messages"
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depends on USB_DWC2_DEBUG
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help
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Say Y here to enable verbose debugging messages in the DWC2 Driver.
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WARNING: Enabling this will quickly fill your message log.
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If in doubt, say N.
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config USB_DWC2_TRACK_MISSED_SOFS
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bool "Enable Missed SOF Tracking"
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help
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Say Y here to enable logging of missed SOF events to the dmesg log.
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WARNING: This feature is still experimental.
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If in doubt, say N.
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config USB_DWC2_DEBUG_PERIODIC
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bool "Enable Debugging Messages For Periodic Transfers"
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depends on USB_DWC2_DEBUG || USB_DWC2_VERBOSE
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default y
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help
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Say N here to disable (verbose) debugging messages to be
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logged for periodic transfers. This allows better debugging of
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non-periodic transfers, but of course the debug logs will be
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incomplete. Note that this also disables some debug messages
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for which the transfer type cannot be deduced.
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endif
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