94 lines
2.6 KiB
Plaintext
94 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung Exynos5433 TM2 board device tree source
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*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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*
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* Device tree source file for Samsung's TM2 board which is based on
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* Samsung Exynos5433 SoC.
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*/
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#include "exynos5433-tm2-common.dtsi"
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/ {
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model = "Samsung TM2 board";
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compatible = "samsung,tm2", "samsung,exynos5433";
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};
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&cmu_disp {
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/*
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* TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
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* clocks properties for DISP CMU for each board to keep them together
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* for easier review and maintenance.
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*/
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assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
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<&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
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<&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
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<&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
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<&cmu_disp CLK_MOUT_SCLK_DSIM0>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
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<&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
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<&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
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<&cmu_disp CLK_MOUT_DISP_PLL>,
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<&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>,
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<&cmu_disp CLK_MOUT_SCLK_DSD_USER>;
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assigned-clock-parents = <0>, <0>,
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<&cmu_mif CLK_ACLK_DISP_333>,
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<&cmu_mif CLK_SCLK_DSIM0_DISP>,
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<&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
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<&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
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<&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
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<&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
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<&cmu_disp CLK_FOUT_DISP_PLL>,
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<&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
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<&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
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<&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
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<&cmu_mif CLK_SCLK_DSD_DISP>;
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assigned-clock-rates = <250000000>, <400000000>;
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};
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&dsi {
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panel@0 {
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compatible = "samsung,s6e3ha2";
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reg = <0>;
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vdd3-supply = <&ldo27_reg>;
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vci-supply = <&ldo28_reg>;
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reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
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enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
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};
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};
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&hsi2c_9 {
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status = "okay";
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touchkey@20 {
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compatible = "cypress,tm2-touchkey";
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reg = <0x20>;
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interrupt-parent = <&gpa3>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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vcc-supply = <&ldo32_reg>;
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vdd-supply = <&ldo33_reg>;
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};
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};
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&ldo31_reg {
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regulator-name = "TSP_VDD_1.85V_AP";
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regulator-min-microvolt = <1850000>;
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regulator-max-microvolt = <1850000>;
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};
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&ldo38_reg {
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regulator-name = "VCC_3.0V_MOTOR_AP";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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&stmfts {
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touchscreen-size-x = <1439>;
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touchscreen-size-y = <2559>;
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};
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