288 lines
7.4 KiB
C
288 lines
7.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_IO_H
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#define _ASM_IA64_IO_H
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/*
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* This file contains the definitions for the emulated IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated to
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* (a) handle it all in a way that makes gcc able to optimize it as
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* well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
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* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
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*/
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#include <asm/unaligned.h>
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#include <asm/early_ioremap.h>
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/* We don't use IO slowdowns on the ia64, but.. */
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#define __SLOW_DOWN_IO do { } while (0)
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#define SLOW_DOWN_IO do { } while (0)
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#define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED)
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/*
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* The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
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* large machines may have multiple other I/O spaces so we can't place any a priori limit
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* on IO_SPACE_LIMIT. These additional spaces are described in ACPI.
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*/
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#define IO_SPACE_LIMIT 0xffffffffffffffffUL
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#define MAX_IO_SPACES_BITS 8
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#define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS)
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#define IO_SPACE_BITS 24
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#define IO_SPACE_SIZE (1UL << IO_SPACE_BITS)
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#define IO_SPACE_NR(port) ((port) >> IO_SPACE_BITS)
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#define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS)
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#define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1))
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#define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff))
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struct io_space {
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unsigned long mmio_base; /* base in MMIO space */
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int sparse;
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};
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extern struct io_space io_space[];
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extern unsigned int num_io_spaces;
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# ifdef __KERNEL__
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/*
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* All MMIO iomem cookies are in region 6; anything less is a PIO cookie:
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* 0xCxxxxxxxxxxxxxxx MMIO cookie (return from ioremap)
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* 0x000000001SPPPPPP PIO cookie (S=space number, P..P=port)
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*
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* ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch
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* code that uses bare port numbers without the prerequisite pci_iomap().
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*/
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#define PIO_OFFSET (1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS))
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#define PIO_MASK (PIO_OFFSET - 1)
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#define PIO_RESERVED __IA64_UNCACHED_OFFSET
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#define HAVE_ARCH_PIO_SIZE
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#include <asm/intrinsics.h>
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#include <asm/page.h>
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#include <asm-generic/iomap.h>
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/*
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* Change virtual addresses to physical addresses and vv.
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*/
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static inline unsigned long
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virt_to_phys (volatile void *address)
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{
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return (unsigned long) address - PAGE_OFFSET;
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}
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#define virt_to_phys virt_to_phys
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static inline void*
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phys_to_virt (unsigned long address)
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{
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return (void *) (address + PAGE_OFFSET);
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}
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#define phys_to_virt phys_to_virt
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#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
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extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */
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extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count);
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/*
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* The following two macros are deprecated and scheduled for removal.
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* Please use the PCI-DMA interface defined in <asm/pci.h> instead.
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*/
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#define bus_to_virt phys_to_virt
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#define virt_to_bus virt_to_phys
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#define page_to_bus page_to_phys
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# endif /* KERNEL */
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/*
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* Memory fence w/accept. This should never be used in code that is
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* not IA-64 specific.
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*/
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#define __ia64_mf_a() ia64_mfa()
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static inline void*
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__ia64_mk_io_addr (unsigned long port)
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{
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struct io_space *space;
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unsigned long offset;
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space = &io_space[IO_SPACE_NR(port)];
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port = IO_SPACE_PORT(port);
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if (space->sparse)
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offset = IO_SPACE_SPARSE_ENCODING(port);
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else
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offset = port;
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return (void *) (space->mmio_base | offset);
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}
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/*
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* For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure
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* that the access has completed before executing other I/O accesses. Since we're doing
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* the accesses through an uncachable (UC) translation, the CPU will execute them in
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* program order. However, we still need to tell the compiler not to shuffle them around
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* during optimization, which is why we use "volatile" pointers.
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*/
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#define inb inb
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static inline unsigned int inb(unsigned long port)
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{
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volatile unsigned char *addr = __ia64_mk_io_addr(port);
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unsigned char ret;
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ret = *addr;
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__ia64_mf_a();
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return ret;
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}
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#define inw inw
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static inline unsigned int inw(unsigned long port)
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{
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volatile unsigned short *addr = __ia64_mk_io_addr(port);
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unsigned short ret;
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ret = *addr;
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__ia64_mf_a();
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return ret;
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}
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#define inl inl
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static inline unsigned int inl(unsigned long port)
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{
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volatile unsigned int *addr = __ia64_mk_io_addr(port);
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unsigned int ret;
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ret = *addr;
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__ia64_mf_a();
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return ret;
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}
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#define outb outb
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static inline void outb(unsigned char val, unsigned long port)
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{
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volatile unsigned char *addr = __ia64_mk_io_addr(port);
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*addr = val;
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__ia64_mf_a();
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}
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#define outw outw
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static inline void outw(unsigned short val, unsigned long port)
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{
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volatile unsigned short *addr = __ia64_mk_io_addr(port);
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*addr = val;
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__ia64_mf_a();
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}
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#define outl outl
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static inline void outl(unsigned int val, unsigned long port)
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{
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volatile unsigned int *addr = __ia64_mk_io_addr(port);
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*addr = val;
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__ia64_mf_a();
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}
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#define insb insb
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static inline void insb(unsigned long port, void *dst, unsigned long count)
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{
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unsigned char *dp = dst;
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while (count--)
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*dp++ = inb(port);
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}
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#define insw insw
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static inline void insw(unsigned long port, void *dst, unsigned long count)
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{
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unsigned short *dp = dst;
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while (count--)
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put_unaligned(inw(port), dp++);
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}
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#define insl insl
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static inline void insl(unsigned long port, void *dst, unsigned long count)
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{
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unsigned int *dp = dst;
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while (count--)
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put_unaligned(inl(port), dp++);
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}
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#define outsb outsb
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static inline void outsb(unsigned long port, const void *src,
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unsigned long count)
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{
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const unsigned char *sp = src;
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while (count--)
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outb(*sp++, port);
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}
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#define outsw outsw
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static inline void outsw(unsigned long port, const void *src,
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unsigned long count)
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{
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const unsigned short *sp = src;
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while (count--)
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outw(get_unaligned(sp++), port);
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}
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#define outsl outsl
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static inline void outsl(unsigned long port, const void *src,
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unsigned long count)
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{
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const unsigned int *sp = src;
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while (count--)
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outl(get_unaligned(sp++), port);
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}
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# ifdef __KERNEL__
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extern void __iomem * ioremap(unsigned long offset, unsigned long size);
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extern void __iomem * ioremap_uc(unsigned long offset, unsigned long size);
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extern void iounmap (volatile void __iomem *addr);
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static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size)
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{
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return ioremap(phys_addr, size);
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}
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#define ioremap ioremap
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#define ioremap_cache ioremap_cache
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#define ioremap_uc ioremap_uc
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#define iounmap iounmap
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/*
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* String version of IO memory access ops:
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*/
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extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
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extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
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extern void memset_io(volatile void __iomem *s, int c, long n);
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#define memcpy_fromio memcpy_fromio
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#define memcpy_toio memcpy_toio
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#define memset_io memset_io
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#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
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#define xlate_dev_mem_ptr xlate_dev_mem_ptr
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#include <asm-generic/io.h>
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#undef PCI_IOBASE
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# endif /* __KERNEL__ */
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#endif /* _ASM_IA64_IO_H */
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