46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* apb_timer.h: Driver for Langwell APB timer based on Synopsis DesignWare
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*
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* (C) Copyright 2009 Intel Corporation
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* Author: Jacob Pan (jacob.jun.pan@intel.com)
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*
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* Note:
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*/
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#ifndef ASM_X86_APBT_H
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#define ASM_X86_APBT_H
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#include <linux/sfi.h>
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#ifdef CONFIG_APB_TIMER
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/* default memory mapped register base */
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#define LNW_SCU_ADDR 0xFF100000
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#define LNW_EXT_TIMER_OFFSET 0x1B800
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#define APBT_DEFAULT_BASE (LNW_SCU_ADDR+LNW_EXT_TIMER_OFFSET)
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#define LNW_EXT_TIMER_PGOFFSET 0x800
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/* APBT clock speed range from PCLK to fabric base, 25-100MHz */
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#define APBT_MAX_FREQ 50000000
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#define APBT_MIN_FREQ 1000000
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#define APBT_MMAP_SIZE 1024
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#define APBT_DEV_USED 1
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extern void apbt_time_init(void);
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extern unsigned long apbt_quick_calibrate(void);
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extern int arch_setup_apbt_irqs(int irq, int trigger, int mask, int cpu);
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extern void apbt_setup_secondary_clock(void);
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extern struct sfi_timer_table_entry *sfi_get_mtmr(int hint);
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extern void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr);
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extern int sfi_mtimer_num;
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#else /* CONFIG_APB_TIMER */
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static inline unsigned long apbt_quick_calibrate(void) {return 0; }
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static inline void apbt_time_init(void) { }
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#endif
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#endif /* ASM_X86_APBT_H */
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